WCH RISC-V software breakpoints, and a few other bits of refactoring/tidying
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@@ -59,8 +59,6 @@ namespace Targets::RiscV
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this->stop();
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}
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this->clearAllBreakpoints();
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this->run();
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this->riscVDebugInterface->deactivate();
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}
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@@ -80,26 +78,6 @@ namespace Targets::RiscV
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this->riscVDebugInterface->reset();
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}
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void RiscV::setSoftwareBreakpoint(TargetMemoryAddress address) {
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throw Exceptions::Exception{"TARGET - SW breakpoints not supported"};
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}
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void RiscV::removeSoftwareBreakpoint(TargetMemoryAddress address) {
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throw Exceptions::Exception{"TARGET - SW breakpoints not supported"};
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}
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void RiscV::setHardwareBreakpoint(TargetMemoryAddress address) {
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this->riscVDebugInterface->setHardwareBreakpoint(address);
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}
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void RiscV::removeHardwareBreakpoint(TargetMemoryAddress address) {
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this->riscVDebugInterface->clearHardwareBreakpoint(address);
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}
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void RiscV::clearAllBreakpoints() {
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this->riscVDebugInterface->clearAllHardwareBreakpoints();
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}
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TargetRegisterDescriptorAndValuePairs RiscV::readRegisters(const TargetRegisterDescriptors& descriptors) {
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auto output = TargetRegisterDescriptorAndValuePairs{};
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@@ -316,10 +294,12 @@ namespace Targets::RiscV
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}
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void RiscV::enableProgrammingMode() {
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this->riscVDebugInterface->enableProgrammingMode();
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this->programmingMode = true;
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}
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void RiscV::disableProgrammingMode() {
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this->riscVDebugInterface->disableProgrammingMode();
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this->programmingMode = false;
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}
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