Renamed RiscVDebugInterface::clearAllBreakpoints() in preparation for separating HW breakpoints from SW breakpoints.

This commit is contained in:
Nav
2024-10-07 20:02:39 +01:00
parent 607a344107
commit 248c51acc8
4 changed files with 5 additions and 5 deletions

View File

@@ -103,7 +103,7 @@ namespace DebugToolDrivers::Protocols::RiscVDebugSpec
if (!this->triggerDescriptorsByIndex.empty()) {
// Clear any left-over triggers from the previous debug session
this->clearAllBreakpoints();
this->clearAllHardwareBreakpoints();
}
auto debugControlStatusRegister = this->readDebugControlStatusRegister();
@@ -300,7 +300,7 @@ namespace DebugToolDrivers::Protocols::RiscVDebugSpec
this->allocatedTriggerIndices.erase(triggerDescriptor.index);
}
void DebugTranslator::clearAllBreakpoints() {
void DebugTranslator::clearAllHardwareBreakpoints() {
// To ensure that any untracked breakpoints are cleared, we clear all triggers on the target.
for (const auto [triggerIndex, triggerDescriptor] : this->triggerDescriptorsByIndex) {
this->clearTrigger(triggerDescriptor);

View File

@@ -66,7 +66,7 @@ namespace DebugToolDrivers::Protocols::RiscVDebugSpec
std::uint16_t getHardwareBreakpointCount() override;
void setHardwareBreakpoint(Targets::TargetMemoryAddress address) override;
void clearHardwareBreakpoint(Targets::TargetMemoryAddress address) override;
void clearAllBreakpoints() override;
void clearAllHardwareBreakpoints() override;
Targets::TargetRegisterDescriptorAndValuePairs readCpuRegisters(
const Targets::TargetRegisterDescriptors& descriptors

View File

@@ -34,7 +34,7 @@ namespace DebugToolDrivers::TargetInterfaces::RiscV
virtual std::uint16_t getHardwareBreakpointCount() = 0;
virtual void setHardwareBreakpoint(Targets::TargetMemoryAddress address) = 0;
virtual void clearHardwareBreakpoint(Targets::TargetMemoryAddress address) = 0;
virtual void clearAllBreakpoints() = 0;
virtual void clearAllHardwareBreakpoints() = 0;
virtual Targets::TargetRegisterDescriptorAndValuePairs readCpuRegisters(
const Targets::TargetRegisterDescriptors& descriptors

View File

@@ -150,7 +150,7 @@ namespace Targets::RiscV
}
void RiscV::clearAllBreakpoints() {
this->riscVDebugInterface->clearAllBreakpoints();
this->riscVDebugInterface->clearAllHardwareBreakpoints();
}
TargetRegisterDescriptorAndValuePairs RiscV::readRegisters(const TargetRegisterDescriptors& descriptors) {