Renamed RiscVDebugInterface::clearAllBreakpoints() in preparation for separating HW breakpoints from SW breakpoints.
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@@ -103,7 +103,7 @@ namespace DebugToolDrivers::Protocols::RiscVDebugSpec
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if (!this->triggerDescriptorsByIndex.empty()) {
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// Clear any left-over triggers from the previous debug session
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this->clearAllBreakpoints();
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this->clearAllHardwareBreakpoints();
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}
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auto debugControlStatusRegister = this->readDebugControlStatusRegister();
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@@ -300,7 +300,7 @@ namespace DebugToolDrivers::Protocols::RiscVDebugSpec
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this->allocatedTriggerIndices.erase(triggerDescriptor.index);
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}
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void DebugTranslator::clearAllBreakpoints() {
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void DebugTranslator::clearAllHardwareBreakpoints() {
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// To ensure that any untracked breakpoints are cleared, we clear all triggers on the target.
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for (const auto [triggerIndex, triggerDescriptor] : this->triggerDescriptorsByIndex) {
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this->clearTrigger(triggerDescriptor);
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@@ -66,7 +66,7 @@ namespace DebugToolDrivers::Protocols::RiscVDebugSpec
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std::uint16_t getHardwareBreakpointCount() override;
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void setHardwareBreakpoint(Targets::TargetMemoryAddress address) override;
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void clearHardwareBreakpoint(Targets::TargetMemoryAddress address) override;
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void clearAllBreakpoints() override;
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void clearAllHardwareBreakpoints() override;
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Targets::TargetRegisterDescriptorAndValuePairs readCpuRegisters(
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const Targets::TargetRegisterDescriptors& descriptors
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@@ -34,7 +34,7 @@ namespace DebugToolDrivers::TargetInterfaces::RiscV
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virtual std::uint16_t getHardwareBreakpointCount() = 0;
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virtual void setHardwareBreakpoint(Targets::TargetMemoryAddress address) = 0;
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virtual void clearHardwareBreakpoint(Targets::TargetMemoryAddress address) = 0;
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virtual void clearAllBreakpoints() = 0;
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virtual void clearAllHardwareBreakpoints() = 0;
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virtual Targets::TargetRegisterDescriptorAndValuePairs readCpuRegisters(
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const Targets::TargetRegisterDescriptors& descriptors
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@@ -150,7 +150,7 @@ namespace Targets::RiscV
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}
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void RiscV::clearAllBreakpoints() {
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this->riscVDebugInterface->clearAllBreakpoints();
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this->riscVDebugInterface->clearAllHardwareBreakpoints();
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}
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TargetRegisterDescriptorAndValuePairs RiscV::readRegisters(const TargetRegisterDescriptors& descriptors) {
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