From 213506d1362b461c2fcbc155adcd657823e19dbf Mon Sep 17 00:00:00 2001
From: Nav <nav@navnav.me>
Date: Wed, 9 Jun 2021 22:51:55 +0100
Subject: [PATCH] Corrected TDF pinout/pin-count issues found by the validation
 script

---
 .../AVR8/D-SERIES/AVR128DB48.xml              |  1 +
 .../AVR8/D-SERIES/AVR32DB48.xml               |  1 +
 .../AVR8/D-SERIES/AVR64DB48.xml               |  1 +
 .../AVR8/MEGA/ATMEGA1280.xml                  | 12 +--
 .../AVR8/MEGA/ATMEGA168A.xml                  | 35 ---------
 .../AVR8/MEGA/ATMEGA168PA.xml                 | 35 ---------
 .../AVR8/MEGA/ATMEGA16U2.xml                  |  6 +-
 .../AVR8/MEGA/ATMEGA32U2.xml                  |  6 +-
 .../AVR8/MEGA/ATMEGA48A.xml                   | 35 ---------
 .../AVR8/MEGA/ATMEGA48PA.xml                  | 35 ---------
 .../AVR8/MEGA/ATMEGA640.xml                   | 12 +--
 .../AVR8/MEGA/ATMEGA88A.xml                   | 35 ---------
 .../AVR8/MEGA/ATMEGA88PA.xml                  | 35 ---------
 .../AVR8/MEGA/ATMEGA8U2.xml                   |  6 +-
 .../AVR8/TINY/ATTINY13.xml                    | 30 +++++--
 .../AVR8/TINY/ATTINY13A.xml                   | 34 +++++---
 .../AVR8/TINY/ATTINY1604.xml                  |  3 -
 .../AVR8/TINY/ATTINY24.xml                    | 60 +++++++++++++-
 .../AVR8/TINY/ATTINY24A.xml                   | 17 ++--
 .../AVR8/TINY/ATTINY25.xml                    | 12 +++
 .../AVR8/TINY/ATTINY261.xml                   | 54 ++++++++-----
 .../AVR8/TINY/ATTINY441.xml                   |  6 ++
 .../AVR8/TINY/ATTINY44A.xml                   |  7 ++
 .../AVR8/TINY/ATTINY461.xml                   | 52 ++++++++-----
 .../AVR8/TINY/ATTINY48.xml                    | 14 ++--
 .../AVR8/TINY/ATTINY804.xml                   |  3 -
 .../AVR8/TINY/ATTINY84.xml                    | 78 ++++++++++++++++++-
 .../AVR8/TINY/ATTINY841.xml                   |  6 ++
 .../AVR8/TINY/ATTINY84A.xml                   |  7 ++
 .../AVR8/TINY/ATTINY85.xml                    | 12 +++
 .../AVR8/TINY/ATTINY861.xml                   | 52 ++++++++-----
 .../AVR8/TINY/ATTINY88.xml                    | 14 ++--
 32 files changed, 379 insertions(+), 337 deletions(-)

diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB48.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB48.xml
index 029154ad..0e71ef0a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR128DB48.xml
@@ -4334,6 +4334,7 @@
             <pin pad="PF5" position="39"/>
             <pin pad="PF6" position="40"/>
             <pin pad="UPDI" position="41"/>
+            <pin pad="VDD" position="42"/>
             <pin pad="GND2" position="43"/>
             <pin pad="PA0" position="44"/>
             <pin pad="PA1" position="45"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB48.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB48.xml
index ed5eeabc..e2c4e1c2 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR32DB48.xml
@@ -4332,6 +4332,7 @@
             <pin pad="PF5" position="39"/>
             <pin pad="PF6" position="40"/>
             <pin pad="UPDI" position="41"/>
+            <pin pad="VDD" position="42"/>
             <pin pad="GND2" position="43"/>
             <pin pad="PA0" position="44"/>
             <pin pad="PA1" position="45"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB48.xml b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB48.xml
index f257ab70..c3065788 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/D-SERIES/AVR64DB48.xml
@@ -4332,6 +4332,7 @@
             <pin pad="PF5" position="39"/>
             <pin pad="PF6" position="40"/>
             <pin pad="UPDI" position="41"/>
+            <pin pad="VDD" position="42"/>
             <pin pad="GND2" position="43"/>
             <pin pad="PA0" position="44"/>
             <pin pad="PA1" position="45"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml
index 1893d633..6b698afc 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA1280.xml
@@ -2,13 +2,13 @@
 <target-description-file>
     <variants>
         <variant ordercode="ATmega1280V-8AU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="TQFP100" pinout="TQFP"/>
+                 package="TQFP100" pinout="TQFP100"/>
         <variant ordercode="ATmega1280V-8CU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="CBGA100" pinout="CBGA"/>
+                 package="CBGA100" pinout="CBGA100"/>
         <variant ordercode="ATmega1280-16AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP100" pinout="TQFP"/>
+                 package="TQFP100" pinout="TQFP100"/>
         <variant ordercode="ATmega1280-16CU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="CBGA100" pinout="CBGA"/>
+                 package="CBGA100" pinout="CBGA100"/>
     </variants>
     <device name="ATmega1280" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -1858,7 +1858,7 @@
         </module>
     </modules>
     <pinouts>
-        <pinout name="TQFP">
+        <pinout name="TQFP100">
             <pin pad="PG5" position="1"/>
             <pin pad="PE0" position="2"/>
             <pin pad="PE1" position="3"/>
@@ -1960,7 +1960,7 @@
             <pin pad="GND" position="99"/>
             <pin pad="AVCC" position="100"/>
         </pinout>
-        <pinout name="CBGA">
+        <pinout name="CBGA100">
             <pin pad="GND" position="A1"/>
             <pin pad="AVCC" position="B1"/>
             <pin pad="PE2" position="C1"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml
index 150eeb0d..574f91e1 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168A.xml
@@ -3,8 +3,6 @@
     <variants>
         <variant ordercode="ATmega168A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
                  package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168A-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
-                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega168A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
                  package="QFN28" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega168A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
@@ -1306,38 +1304,5 @@
             <pin position="27" pad="PC4"/>
             <pin position="28" pad="PC5"/>
         </pinout>
-        <pinout name="UFBGA32" caption="UFBGA32">
-            <pin position="B1" pad="PD3"/>
-            <pin position="B2" pad="PD4"/>
-            <pin position="C1" pad="GND"/>
-            <pin position="D1" pad="VDD"/>
-            <pin position="D2" pad="VDD"/>
-            <pin position="E1" pad="PB6"/>
-            <pin position="F1" pad="PB7"/>
-            <pin position="F2" pad="PD5"/>
-            <pin position="E2" pad="PD6"/>
-            <pin position="F3" pad="PD7"/>
-            <pin position="E3" pad="PB0"/>
-            <pin position="F4" pad="PB1"/>
-            <pin position="E4" pad="PB2"/>
-            <pin position="F5" pad="PB3"/>
-            <pin position="F6" pad="PB4"/>
-            <pin position="E6" pad="PB5"/>
-            <pin position="E5" pad="AVCC"/>
-            <pin position="D6" pad="ADC6"/>
-            <pin position="D5" pad="AREF"/>
-            <pin position="C6" pad="GND"/>
-            <pin position="C5" pad="ADC7"/>
-            <pin position="B6" pad="PC0"/>
-            <pin position="A6" pad="PC1"/>
-            <pin position="A5" pad="PC2"/>
-            <pin position="B5" pad="PC3"/>
-            <pin position="A4" pad="PC4"/>
-            <pin position="B4" pad="PC5"/>
-            <pin position="A3" pad="PC6"/>
-            <pin position="B3" pad="PD0"/>
-            <pin position="A2" pad="PD1"/>
-            <pin position="A1" pad="PD2"/>
-        </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml
index ee7c486c..5d9e5a55 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA168PA.xml
@@ -3,8 +3,6 @@
     <variants>
         <variant ordercode="ATmega168PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
                  package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega168PA-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
-                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega168PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
                  package="QFN28" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega168PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32"
@@ -1314,38 +1312,5 @@
             <pin position="27" pad="PC4"/>
             <pin position="28" pad="PC5"/>
         </pinout>
-        <pinout name="UFBGA32" caption="UFBGA32">
-            <pin position="B1" pad="PD3"/>
-            <pin position="B2" pad="PD4"/>
-            <pin position="C1" pad="GND"/>
-            <pin position="D1" pad="VDD"/>
-            <pin position="D2" pad="VDD"/>
-            <pin position="E1" pad="PB6"/>
-            <pin position="F1" pad="PB7"/>
-            <pin position="F2" pad="PD5"/>
-            <pin position="E2" pad="PD6"/>
-            <pin position="F3" pad="PD7"/>
-            <pin position="E3" pad="PB0"/>
-            <pin position="F4" pad="PB1"/>
-            <pin position="E4" pad="PB2"/>
-            <pin position="F5" pad="PB3"/>
-            <pin position="F6" pad="PB4"/>
-            <pin position="E6" pad="PB5"/>
-            <pin position="E5" pad="AVCC"/>
-            <pin position="D6" pad="ADC6"/>
-            <pin position="D5" pad="AREF"/>
-            <pin position="C6" pad="GND"/>
-            <pin position="C5" pad="ADC7"/>
-            <pin position="B6" pad="PC0"/>
-            <pin position="A6" pad="PC1"/>
-            <pin position="A5" pad="PC2"/>
-            <pin position="B5" pad="PC3"/>
-            <pin position="A4" pad="PC4"/>
-            <pin position="B4" pad="PC5"/>
-            <pin position="A3" pad="PC6"/>
-            <pin position="B3" pad="PD0"/>
-            <pin position="A2" pad="PD1"/>
-            <pin position="A1" pad="PD2"/>
-        </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml
index 0fc3c2ca..53fb4523 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA16U2.xml
@@ -2,9 +2,9 @@
 <target-description-file>
     <variants>
         <variant ordercode="ATmega16U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP32" pinout="QUAD"/>
+                 package="TQFP32" pinout="QFP32"/>
         <variant ordercode="ATmega16U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="QFN32" pinout="QUAD"/>
+                 package="QFN32" pinout="QFP32"/>
     </variants>
     <device name="ATmega16U2" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -1143,7 +1143,7 @@
         </module>
     </modules>
     <pinouts>
-        <pinout name="QUAD">
+        <pinout name="QFP32">
             <pin pad="XTAL1" position="1"/>
             <pin pad="PC0" position="2"/>
             <pin pad="GND" position="3"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml
index ae9c0e1d..67e3436a 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA32U2.xml
@@ -2,9 +2,9 @@
 <target-description-file>
     <variants>
         <variant ordercode="ATmega32U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP32" pinout="QUAD"/>
+                 package="TQFP32" pinout="QFP32"/>
         <variant ordercode="ATmega32U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="QFN32" pinout="QUAD"/>
+                 package="QFN32" pinout="QFP32"/>
     </variants>
     <device name="ATmega32U2" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -1117,7 +1117,7 @@
         </module>
     </modules>
     <pinouts>
-        <pinout name="QUAD">
+        <pinout name="QFP32">
             <pin pad="XTAL1" position="1"/>
             <pin pad="PC0" position="2"/>
             <pin pad="GND" position="3"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml
index 2b22c5ab..3ab640a1 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48A.xml
@@ -3,8 +3,6 @@
     <variants>
         <variant ordercode="ATmega48A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
                  package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48A-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
-                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega48A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28"
                  vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega48A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
@@ -1281,38 +1279,5 @@
             <pin position="27" pad="PC4"/>
             <pin position="28" pad="PC5"/>
         </pinout>
-        <pinout name="UFBGA32" caption="UFBGA32">
-            <pin position="B1" pad="PD3"/>
-            <pin position="B2" pad="PD4"/>
-            <pin position="C1" pad="GND"/>
-            <pin position="D1" pad="VDD"/>
-            <pin position="D2" pad="VDD"/>
-            <pin position="E1" pad="PB6"/>
-            <pin position="F1" pad="PB7"/>
-            <pin position="F2" pad="PD5"/>
-            <pin position="E2" pad="PD6"/>
-            <pin position="F3" pad="PD7"/>
-            <pin position="E3" pad="PB0"/>
-            <pin position="F4" pad="PB1"/>
-            <pin position="E4" pad="PB2"/>
-            <pin position="F5" pad="PB3"/>
-            <pin position="F6" pad="PB4"/>
-            <pin position="E6" pad="PB5"/>
-            <pin position="E5" pad="AVCC"/>
-            <pin position="D6" pad="ADC6"/>
-            <pin position="D5" pad="AREF"/>
-            <pin position="C6" pad="GND"/>
-            <pin position="C5" pad="ADC7"/>
-            <pin position="B6" pad="PC0"/>
-            <pin position="A6" pad="PC1"/>
-            <pin position="A5" pad="PC2"/>
-            <pin position="B5" pad="PC3"/>
-            <pin position="A4" pad="PC4"/>
-            <pin position="B4" pad="PC5"/>
-            <pin position="A3" pad="PC6"/>
-            <pin position="B3" pad="PD0"/>
-            <pin position="A2" pad="PD1"/>
-            <pin position="A1" pad="PD2"/>
-        </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml
index e9abf32d..3e5c2203 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA48PA.xml
@@ -3,8 +3,6 @@
     <variants>
         <variant ordercode="ATmega48PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
                  package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega48PA-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
-                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega48PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
                  package="QFN28" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega48PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
@@ -1291,38 +1289,5 @@
             <pin position="27" pad="PC4"/>
             <pin position="28" pad="PC5"/>
         </pinout>
-        <pinout name="UFBGA32" caption="UFBGA32">
-            <pin position="B1" pad="PD3"/>
-            <pin position="B2" pad="PD4"/>
-            <pin position="C1" pad="GND"/>
-            <pin position="D1" pad="VDD"/>
-            <pin position="D2" pad="VDD"/>
-            <pin position="E1" pad="PB6"/>
-            <pin position="F1" pad="PB7"/>
-            <pin position="F2" pad="PD5"/>
-            <pin position="E2" pad="PD6"/>
-            <pin position="F3" pad="PD7"/>
-            <pin position="E3" pad="PB0"/>
-            <pin position="F4" pad="PB1"/>
-            <pin position="E4" pad="PB2"/>
-            <pin position="F5" pad="PB3"/>
-            <pin position="F6" pad="PB4"/>
-            <pin position="E6" pad="PB5"/>
-            <pin position="E5" pad="AVCC"/>
-            <pin position="D6" pad="ADC6"/>
-            <pin position="D5" pad="AREF"/>
-            <pin position="C6" pad="GND"/>
-            <pin position="C5" pad="ADC7"/>
-            <pin position="B6" pad="PC0"/>
-            <pin position="A6" pad="PC1"/>
-            <pin position="A5" pad="PC2"/>
-            <pin position="B5" pad="PC3"/>
-            <pin position="A4" pad="PC4"/>
-            <pin position="B4" pad="PC5"/>
-            <pin position="A3" pad="PC6"/>
-            <pin position="B3" pad="PD0"/>
-            <pin position="A2" pad="PD1"/>
-            <pin position="A1" pad="PD2"/>
-        </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA640.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA640.xml
index 644ea6b0..63858640 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA640.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA640.xml
@@ -2,13 +2,13 @@
 <target-description-file>
     <variants>
         <variant ordercode="ATmega640V-8AU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="TQFP100" pinout="TQFP"/>
+                 package="TQFP100" pinout="TQFP100"/>
         <variant ordercode="ATmega640V-8CU" speedmax="8000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="CBGA100" pinout="CBGA"/>
+                 package="CBGA100" pinout="CBGA100"/>
         <variant ordercode="ATmega640-16AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP100" pinout="TQFP"/>
+                 package="TQFP100" pinout="TQFP100"/>
         <variant ordercode="ATmega640-16CU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="CBGA100" pinout="CBGA"/>
+                 package="CBGA100" pinout="CBGA100"/>
     </variants>
     <device name="ATmega640" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -1851,7 +1851,7 @@
         </module>
     </modules>
     <pinouts>
-        <pinout name="TQFP">
+        <pinout name="TQFP100">
             <pin pad="PG5" position="1"/>
             <pin pad="PE0" position="2"/>
             <pin pad="PE1" position="3"/>
@@ -1953,7 +1953,7 @@
             <pin pad="GND" position="99"/>
             <pin pad="AVCC" position="100"/>
         </pinout>
-        <pinout name="CBGA">
+        <pinout name="CBGA100">
             <pin pad="GND" position="A1"/>
             <pin pad="AVCC" position="B1"/>
             <pin pad="PE2" position="C1"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml
index 444816aa..4fc0e286 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88A.xml
@@ -3,8 +3,6 @@
     <variants>
         <variant ordercode="ATmega88A-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
                  package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88A-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
-                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega88A-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28" package="QFN28"
                  vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega88A-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
@@ -1306,38 +1304,5 @@
             <pin position="27" pad="PC4"/>
             <pin position="28" pad="PC5"/>
         </pinout>
-        <pinout name="UFBGA32" caption="UFBGA32">
-            <pin position="B1" pad="PD3"/>
-            <pin position="B2" pad="PD4"/>
-            <pin position="C1" pad="GND"/>
-            <pin position="D1" pad="VDD"/>
-            <pin position="D2" pad="VDD"/>
-            <pin position="E1" pad="PB6"/>
-            <pin position="F1" pad="PB7"/>
-            <pin position="F2" pad="PD5"/>
-            <pin position="E2" pad="PD6"/>
-            <pin position="F3" pad="PD7"/>
-            <pin position="E3" pad="PB0"/>
-            <pin position="F4" pad="PB1"/>
-            <pin position="E4" pad="PB2"/>
-            <pin position="F5" pad="PB3"/>
-            <pin position="F6" pad="PB4"/>
-            <pin position="E6" pad="PB5"/>
-            <pin position="E5" pad="AVCC"/>
-            <pin position="D6" pad="ADC6"/>
-            <pin position="D5" pad="AREF"/>
-            <pin position="C6" pad="GND"/>
-            <pin position="C5" pad="ADC7"/>
-            <pin position="B6" pad="PC0"/>
-            <pin position="A6" pad="PC1"/>
-            <pin position="A5" pad="PC2"/>
-            <pin position="B5" pad="PC3"/>
-            <pin position="A4" pad="PC4"/>
-            <pin position="B4" pad="PC5"/>
-            <pin position="A3" pad="PC6"/>
-            <pin position="B3" pad="PD0"/>
-            <pin position="A2" pad="PD1"/>
-            <pin position="A1" pad="PD2"/>
-        </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml
index d4ef0ead..4f97b802 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA88PA.xml
@@ -3,8 +3,6 @@
     <variants>
         <variant ordercode="ATmega88PA-AU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="TQFP32"
                  package="TQFP32" vccmin="1.8" vccmax="5.5"/>
-        <variant ordercode="ATmega88PA-CCU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="UFBGA32"
-                 package="UFBGA32" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega88PA-MMH" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN28"
                  package="QFN28" vccmin="1.8" vccmax="5.5"/>
         <variant ordercode="ATmega88PA-MU" tempmin="-40" tempmax="85" speedmax="20000000" pinout="QFN32" package="QFN32"
@@ -1316,38 +1314,5 @@
             <pin position="27" pad="PC4"/>
             <pin position="28" pad="PC5"/>
         </pinout>
-        <pinout name="UFBGA32" caption="UFBGA32">
-            <pin position="B1" pad="PD3"/>
-            <pin position="B2" pad="PD4"/>
-            <pin position="C1" pad="GND"/>
-            <pin position="D1" pad="VDD"/>
-            <pin position="D2" pad="VDD"/>
-            <pin position="E1" pad="PB6"/>
-            <pin position="F1" pad="PB7"/>
-            <pin position="F2" pad="PD5"/>
-            <pin position="E2" pad="PD6"/>
-            <pin position="F3" pad="PD7"/>
-            <pin position="E3" pad="PB0"/>
-            <pin position="F4" pad="PB1"/>
-            <pin position="E4" pad="PB2"/>
-            <pin position="F5" pad="PB3"/>
-            <pin position="F6" pad="PB4"/>
-            <pin position="E6" pad="PB5"/>
-            <pin position="E5" pad="AVCC"/>
-            <pin position="D6" pad="ADC6"/>
-            <pin position="D5" pad="AREF"/>
-            <pin position="C6" pad="GND"/>
-            <pin position="C5" pad="ADC7"/>
-            <pin position="B6" pad="PC0"/>
-            <pin position="A6" pad="PC1"/>
-            <pin position="A5" pad="PC2"/>
-            <pin position="B5" pad="PC3"/>
-            <pin position="A4" pad="PC4"/>
-            <pin position="B4" pad="PC5"/>
-            <pin position="A3" pad="PC6"/>
-            <pin position="B3" pad="PD0"/>
-            <pin position="A2" pad="PD1"/>
-            <pin position="A1" pad="PD2"/>
-        </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml
index a0772f8d..c25b7991 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/MEGA/ATMEGA8U2.xml
@@ -2,9 +2,9 @@
 <target-description-file>
     <variants>
         <variant ordercode="ATmega8U2-AU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="TQFP32" pinout="QUAD"/>
+                 package="TQFP32" pinout="QFP32"/>
         <variant ordercode="ATmega8U2-MU" speedmax="16000000" tempmin="-40" tempmax="85" vccmin="2.7" vccmax="5.5"
-                 package="QFN32" pinout="QUAD"/>
+                 package="QFN32" pinout="QFP32"/>
     </variants>
     <device name="ATmega8U2" architecture="AVR8" family="megaAVR">
         <address-spaces>
@@ -1117,7 +1117,7 @@
         </module>
     </modules>
     <pinouts>
-        <pinout name="QUAD">
+        <pinout name="QFP32">
             <pin pad="XTAL1" position="1"/>
             <pin pad="PC0" position="2"/>
             <pin pad="GND" position="3"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13.xml
index a125f1bf..4e19fb7d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13.xml
@@ -2,21 +2,21 @@
 <target-description-file>
     <variants>
         <variant ordercode="ATtiny13V-10PU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP8" pinout="PDIP8_SOIC8"/>
+                 package="PDIP8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13V-10SU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13V-10SSU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13V-10MU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
                  package="MLF20" pinout="MLF20"/>
         <variant ordercode="ATtiny13V-10MMU" speedmax="10000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
                  package="MLF10" pinout="MLF10"/>
         <variant ordercode="ATtiny13-20PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP8" pinout="PDIP8_SOIC8"/>
+                 package="PDIP8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13-20SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13-20SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13-20MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
                  package="MLF20" pinout="MLF20"/>
         <variant ordercode="ATtiny13-20MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
@@ -634,7 +634,7 @@
         </module>
     </modules>
     <pinouts>
-        <pinout name="PDIP8_SOIC8">
+        <pinout name="PDIP_SOIC_8">
             <pin pad="PB5" position="1"/>
             <pin pad="PB3" position="2"/>
             <pin pad="PB4" position="3"/>
@@ -647,20 +647,34 @@
         <pinout name="MLF20">
             <pin pad="PB5" position="1"/>
             <pin pad="PB3" position="2"/>
+            <pin pad="NC" position="3"/>
+            <pin pad="NC" position="4"/>
             <pin pad="PB4" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="NC" position="9"/>
+            <pin pad="NC" position="10"/>
             <pin pad="PB0" position="11"/>
             <pin pad="PB1" position="12"/>
+            <pin pad="NC" position="13"/>
             <pin pad="PB2" position="14"/>
             <pin pad="VCC" position="15"/>
-            <pin pad="GND" position="21"/>
+            <pin pad="NC" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
+            <pin pad="NC" position="20"/>
         </pinout>
         <pinout name="MLF10">
             <pin pad="PB5" position="1"/>
             <pin pad="PB3" position="2"/>
+            <pin pad="NC" position="3"/>
             <pin pad="PB4" position="4"/>
             <pin pad="GND" position="5"/>
             <pin pad="PB0" position="6"/>
             <pin pad="PB1" position="7"/>
+            <pin pad="NC" position="8"/>
             <pin pad="PB2" position="9"/>
             <pin pad="VCC" position="10"/>
         </pinout>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13A.xml
index 7abfc6fe..68196805 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY13A.xml
@@ -2,25 +2,25 @@
 <target-description-file>
     <variants>
         <variant ordercode="ATtiny13A-PU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP8" pinout="PDIP8_SOIC8"/>
+                 package="PDIP8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13A-SH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13A-SSH" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13A-SSU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13A-SU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13A-MMU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
                  package="MLF10" pinout="MLF10"/>
         <variant ordercode="ATtiny13A-MU" speedmax="20000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
                  package="MLF20" pinout="MLF20"/>
         <variant ordercode="ATtiny13A-SN" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13A-SS7" speedmax="20000000" tempmin="-40" tempmax="105" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13A-SF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5"
-                 package="SOIC8" pinout="PDIP8_SOIC8"/>
+                 package="SOIC8" pinout="PDIP_SOIC_8"/>
         <variant ordercode="ATtiny13A-MMF" speedmax="20000000" tempmin="-40" tempmax="125" vccmin="1.8" vccmax="5.5"
                  package="MLF10" pinout="MLF10"/>
     </variants>
@@ -644,7 +644,7 @@
         </module>
     </modules>
     <pinouts>
-        <pinout name="PDIP8_SOIC8">
+        <pinout name="PDIP_SOIC_8">
             <pin pad="PB5" position="1"/>
             <pin pad="PB3" position="2"/>
             <pin pad="PB4" position="3"/>
@@ -657,20 +657,34 @@
         <pinout name="MLF20">
             <pin pad="PB5" position="1"/>
             <pin pad="PB3" position="2"/>
+            <pin pad="NC" position="3"/>
+            <pin pad="NC" position="4"/>
             <pin pad="PB4" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="NC" position="9"/>
+            <pin pad="NC" position="10"/>
             <pin pad="PB0" position="11"/>
             <pin pad="PB1" position="12"/>
+            <pin pad="NC" position="13"/>
             <pin pad="PB2" position="14"/>
             <pin pad="VCC" position="15"/>
-            <pin pad="GND" position="21"/>
+            <pin pad="NC" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
+            <pin pad="NC" position="20"/>
         </pinout>
         <pinout name="MLF10">
             <pin pad="PB5" position="1"/>
             <pin pad="PB3" position="2"/>
+            <pin pad="NC" position="3"/>
             <pin pad="PB4" position="4"/>
             <pin pad="GND" position="5"/>
             <pin pad="PB0" position="6"/>
             <pin pad="PB1" position="7"/>
+            <pin pad="NC" position="8"/>
             <pin pad="PB2" position="9"/>
             <pin pad="VCC" position="10"/>
         </pinout>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1604.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1604.xml
index 4b137760..bd5e9525 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1604.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY1604.xml
@@ -183,9 +183,6 @@
                         <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
                     </signals>
                 </instance>
-                <instance name="PORTC">
-                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
-                </instance>
             </module>
             <module id="I2603" name="PORTMUX">
                 <instance name="PORTMUX">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24.xml
index 3a820ac7..49f3aa39 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24.xml
@@ -1,7 +1,9 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATtiny24V-10PU" package="PDIP14" pinout="SOIC14" tempmax="85" tempmin="-40"/>
+        <variant ordercode="ATtiny24-20SSU" package="SOIC14" pinout="SOIC14" tempmax="85" tempmin="-40"/>
+        <variant ordercode="ATtiny24V-10MU" package="QFN20" pinout="QFN20" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="ATtiny24" architecture="AVR8" family="tinyAVR">
         <address-spaces>
@@ -37,10 +39,26 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                    </signals>
                 </instance>
             </module>
             <module name="AC">
@@ -763,4 +781,44 @@
             </register-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="SOIC14">
+            <pin pad="VCC" position="1"/>
+            <pin pad="PB0" position="2"/>
+            <pin pad="PB1" position="3"/>
+            <pin pad="PB3" position="4"/>
+            <pin pad="PB2" position="5"/>
+            <pin pad="PA7" position="6"/>
+            <pin pad="PA6" position="7"/>
+            <pin pad="PA5" position="8"/>
+            <pin pad="PA4" position="9"/>
+            <pin pad="PA3" position="10"/>
+            <pin pad="PA2" position="11"/>
+            <pin pad="PA1" position="12"/>
+            <pin pad="PA0" position="13"/>
+            <pin pad="GND" position="14"/>
+        </pinout>
+        <pinout name="QFN20">
+            <pin pad="PA4" position="1"/>
+            <pin pad="PA3" position="2"/>
+            <pin pad="PA2" position="3"/>
+            <pin pad="PA1" position="4"/>
+            <pin pad="PA0" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="NC" position="10"/>
+            <pin pad="PB0" position="11"/>
+            <pin pad="PB1" position="12"/>
+            <pin pad="PB3" position="13"/>
+            <pin pad="PB2" position="14"/>
+            <pin pad="PA7" position="15"/>
+            <pin pad="PA6" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
+            <pin pad="PA5" position="20"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24A.xml
index 7a3746c6..e1c6f8d7 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY24A.xml
@@ -3,9 +3,9 @@
     <variants>
         <variant ordercode="ATtiny24A-CCU" package="UFBGA16" pinout="BGA_16" speedmax="20000000" tempmax="85"
                  tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-MMH" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="85"
+        <variant ordercode="ATtiny24A-MMH" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="85"
                  tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-MU" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="85" tempmin="-40"
+        <variant ordercode="ATtiny24A-MU" package="QFN20" pinout="QFN20" speedmax="20000000" tempmax="85" tempmin="-40"
                  vccmax="5.5" vccmin="1.8"/>
         <variant ordercode="ATtiny24A-PU" package="PDIP14" pinout="SOIC_14" speedmax="20000000" tempmax="85"
                  tempmin="-40" vccmax="5.5" vccmin="1.8"/>
@@ -13,9 +13,9 @@
                  tempmin="-40" vccmax="5.5" vccmin="1.8"/>
         <variant ordercode="ATtiny24A-SSN" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="105"
                  tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-MF" package="QFN20" pinout="QFN_20" speedmax="20000000" tempmax="125"
+        <variant ordercode="ATtiny24A-MF" package="QFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
                  tempmin="-40" vccmax="5.5" vccmin="1.8"/>
-        <variant ordercode="ATtiny24A-MM8" package="VQFN20" pinout="QFN_20" speedmax="20000000" tempmax="125"
+        <variant ordercode="ATtiny24A-MM8" package="VQFN20" pinout="QFN20" speedmax="20000000" tempmax="125"
                  tempmin="-40" vccmax="5.5" vccmin="1.8"/>
         <variant ordercode="ATtiny24A-SSF" package="SOIC14" pinout="SOIC_14" speedmax="20000000" tempmax="125"
                  tempmin="-40" vccmax="5.5" vccmin="1.8"/>
@@ -871,23 +871,30 @@
             <pin pad="PA0" position="13"/>
             <pin pad="GND" position="14"/>
         </pinout>
-        <pinout name="QFN_20">
+        <pinout name="QFN20">
             <pin pad="PA4" position="1"/>
             <pin pad="PA3" position="2"/>
             <pin pad="PA2" position="3"/>
             <pin pad="PA1" position="4"/>
             <pin pad="PA0" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
             <pin pad="GND" position="8"/>
             <pin pad="VCC" position="9"/>
+            <pin pad="NC" position="10"/>
             <pin pad="PB0" position="11"/>
             <pin pad="PB1" position="12"/>
             <pin pad="PB3" position="13"/>
             <pin pad="PB2" position="14"/>
             <pin pad="PA7" position="15"/>
             <pin pad="PA6" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
             <pin pad="PA5" position="20"/>
         </pinout>
         <pinout name="BGA_16">
+            <pin pad="NC" position="A1"/>
             <pin pad="PA5" position="A2"/>
             <pin pad="PA6" position="A3"/>
             <pin pad="PB2" position="A4"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY25.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY25.xml
index ca893230..e0ef0480 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY25.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY25.xml
@@ -898,12 +898,24 @@
         <pinout name="QFN_20">
             <pin pad="PB5" position="1"/>
             <pin pad="PB3" position="2"/>
+            <pin pad="NC" position="3"/>
+            <pin pad="NC" position="4"/>
             <pin pad="PB4" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
             <pin pad="GND" position="8"/>
+            <pin pad="NC" position="9"/>
+            <pin pad="NC" position="10"/>
             <pin pad="PB0" position="11"/>
             <pin pad="PB1" position="12"/>
+            <pin pad="NC" position="13"/>
             <pin pad="PB2" position="14"/>
             <pin pad="VCC" position="15"/>
+            <pin pad="NC" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
+            <pin pad="NC" position="20"/>
         </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261.xml
index 9d25f0a9..ca08e1bd 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY261.xml
@@ -999,27 +999,39 @@
             <pin pad="PA1" position="19"/>
             <pin pad="PA0" position="20"/>
         </pinout>
-        <pinout name="QFN_32">
-            <pin pad="PB3" position="2"/>
-            <pin pad="VCC" position="4"/>
-            <pin pad="GND" position="5"/>
-            <pin pad="PB4" position="7"/>
-            <pin pad="PB5" position="8"/>
-            <pin pad="PB6" position="10"/>
-            <pin pad="PB7" position="11"/>
-            <pin pad="PA7" position="13"/>
-            <pin pad="PA6" position="14"/>
-            <pin pad="PA5" position="15"/>
-            <pin pad="PA4" position="17"/>
-            <pin pad="AVCC" position="18"/>
-            <pin pad="AGND" position="21"/>
-            <pin pad="PA3" position="22"/>
-            <pin pad="PA2" position="23"/>
-            <pin pad="PA1" position="25"/>
-            <pin pad="PA0" position="26"/>
-            <pin pad="PB0" position="30"/>
-            <pin pad="PB1" position="31"/>
-            <pin pad="PB2" position="32"/>
+        <pinout name="QFN32">
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PB3"/>
+            <pin position="3" pad="NC"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="NC"/>
+            <pin position="7" pad="PB4"/>
+            <pin position="8" pad="PB5"/>
+            <pin position="9" pad="NC"/>
+            <pin position="10" pad="PB6"/>
+            <pin position="11" pad="PB7"/>
+            <pin position="12" pad="NC"/>
+            <pin position="13" pad="PA7"/>
+            <pin position="14" pad="PA6"/>
+            <pin position="15" pad="PA5"/>
+            <pin position="16" pad="NC"/>
+            <pin position="17" pad="PA4"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="NC"/>
+            <pin position="20" pad="NC"/>
+            <pin position="21" pad="AGND"/>
+            <pin position="22" pad="PA3"/>
+            <pin position="23" pad="PA2"/>
+            <pin position="24" pad="NC"/>
+            <pin position="25" pad="PA1"/>
+            <pin position="26" pad="PA0"/>
+            <pin position="27" pad="NC"/>
+            <pin position="28" pad="NC"/>
+            <pin position="29" pad="NC"/>
+            <pin position="30" pad="PB0"/>
+            <pin position="31" pad="PB1"/>
+            <pin position="32" pad="PB2"/>
         </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY441.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY441.xml
index 14a17b90..0cb282c0 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY441.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY441.xml
@@ -1194,14 +1194,20 @@
             <pin pad="PA2" position="3"/>
             <pin pad="PA1" position="4"/>
             <pin pad="PA0" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
             <pin pad="GND" position="8"/>
             <pin pad="VCC" position="9"/>
+            <pin pad="NC" position="10"/>
             <pin pad="PB0" position="11"/>
             <pin pad="PB1" position="12"/>
             <pin pad="PB3" position="13"/>
             <pin pad="PB2" position="14"/>
             <pin pad="PA7" position="15"/>
             <pin pad="PA6" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
             <pin pad="PA5" position="20"/>
         </pinout>
     </pinouts>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44A.xml
index 4cdb1078..fa3be70f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY44A.xml
@@ -875,17 +875,24 @@
             <pin pad="PA2" position="3"/>
             <pin pad="PA1" position="4"/>
             <pin pad="PA0" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
             <pin pad="GND" position="8"/>
             <pin pad="VCC" position="9"/>
+            <pin pad="NC" position="10"/>
             <pin pad="PB0" position="11"/>
             <pin pad="PB1" position="12"/>
             <pin pad="PB3" position="13"/>
             <pin pad="PB2" position="14"/>
             <pin pad="PA7" position="15"/>
             <pin pad="PA6" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
             <pin pad="PA5" position="20"/>
         </pinout>
         <pinout name="BGA_16">
+            <pin pad="NC" position="A1"/>
             <pin pad="PA5" position="A2"/>
             <pin pad="PA6" position="A3"/>
             <pin pad="PB2" position="A4"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461.xml
index cf39a24b..9163da39 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY461.xml
@@ -1000,26 +1000,38 @@
             <pin pad="PA0" position="20"/>
         </pinout>
         <pinout name="QFN_32">
-            <pin pad="PB3" position="2"/>
-            <pin pad="VCC" position="4"/>
-            <pin pad="GND" position="5"/>
-            <pin pad="PB4" position="7"/>
-            <pin pad="PB5" position="8"/>
-            <pin pad="PB6" position="10"/>
-            <pin pad="PB7" position="11"/>
-            <pin pad="PA7" position="13"/>
-            <pin pad="PA6" position="14"/>
-            <pin pad="PA5" position="15"/>
-            <pin pad="PA4" position="17"/>
-            <pin pad="AVCC" position="18"/>
-            <pin pad="AGND" position="21"/>
-            <pin pad="PA3" position="22"/>
-            <pin pad="PA2" position="23"/>
-            <pin pad="PA1" position="25"/>
-            <pin pad="PA0" position="26"/>
-            <pin pad="PB0" position="30"/>
-            <pin pad="PB1" position="31"/>
-            <pin pad="PB2" position="32"/>
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PB3"/>
+            <pin position="3" pad="NC"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="NC"/>
+            <pin position="7" pad="PB4"/>
+            <pin position="8" pad="PB5"/>
+            <pin position="9" pad="NC"/>
+            <pin position="10" pad="PB6"/>
+            <pin position="11" pad="PB7"/>
+            <pin position="12" pad="NC"/>
+            <pin position="13" pad="PA7"/>
+            <pin position="14" pad="PA6"/>
+            <pin position="15" pad="PA5"/>
+            <pin position="16" pad="NC"/>
+            <pin position="17" pad="PA4"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="NC"/>
+            <pin position="20" pad="NC"/>
+            <pin position="21" pad="AGND"/>
+            <pin position="22" pad="PA3"/>
+            <pin position="23" pad="PA2"/>
+            <pin position="24" pad="NC"/>
+            <pin position="25" pad="PA1"/>
+            <pin position="26" pad="PA0"/>
+            <pin position="27" pad="NC"/>
+            <pin position="28" pad="NC"/>
+            <pin position="29" pad="NC"/>
+            <pin position="30" pad="PB0"/>
+            <pin position="31" pad="PB1"/>
+            <pin position="32" pad="PB2"/>
         </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY48.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY48.xml
index af9a14fe..9f0afa70 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY48.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY48.xml
@@ -6,13 +6,13 @@
         <variant ordercode="ATtiny48-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
                  package="QFN28" pinout="QFN28"/>
         <variant ordercode="ATtiny48-PU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP28" pinout="PDIP"/>
+                 package="PDIP28" pinout="PDIP28"/>
         <variant ordercode="ATtiny48-AU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="TQFP32" pinout="TQFP32_QFN32"/>
+                 package="TQFP32" pinout="TQFP_QFN_32"/>
         <variant ordercode="ATtiny48-CCU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="UFBGA32" pinout="UFBGA"/>
+                 package="UFBGA32" pinout="UFBGA32"/>
         <variant ordercode="ATtiny48-MU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="QFN32" pinout="TQFP32_QFN32"/>
+                 package="QFN32" pinout="TQFP_QFN_32"/>
     </variants>
     <device name="ATtiny48" architecture="AVR8" family="tinyAVR">
         <address-spaces>
@@ -941,7 +941,7 @@
         </module>
     </modules>
     <pinouts>
-        <pinout name="TQFP32_QFN32">
+        <pinout name="TQFP_QFN_32">
             <pin pad="PD3" position="1"/>
             <pin pad="PD4" position="2"/>
             <pin pad="PA2" position="3"/>
@@ -975,7 +975,7 @@
             <pin pad="PD1" position="31"/>
             <pin pad="PD2" position="32"/>
         </pinout>
-        <pinout name="PDIP">
+        <pinout name="PDIP28">
             <pin pad="PC6" position="1"/>
             <pin pad="PD0" position="2"/>
             <pin pad="PD1" position="3"/>
@@ -1035,7 +1035,7 @@
             <pin pad="PD1" position="27"/>
             <pin pad="PD2" position="28"/>
         </pinout>
-        <pinout name="UFBGA">
+        <pinout name="UFBGA32">
             <pin pad="PD2" position="A1"/>
             <pin pad="PD3" position="B1"/>
             <pin pad="GND" position="C1"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY804.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY804.xml
index 2affeee6..e2c2e589 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY804.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY804.xml
@@ -183,9 +183,6 @@
                         <signal function="IOPORT" group="PIN" index="3" pad="PB3"/>
                     </signals>
                 </instance>
-                <instance name="PORTC">
-                    <register-group address-space="data" name="PORTC" name-in-module="PORT" offset="0x0440"/>
-                </instance>
             </module>
             <module id="I2603" name="PORTMUX">
                 <instance name="PORTMUX">
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84.xml
index 7cb96c04..63779722 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84.xml
@@ -1,7 +1,9 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <target-description-file>
     <variants>
-        <variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/>
+        <variant ordercode="ATtiny84-20PU" package="PDIP14" pinout="SOIC_14" tempmax="85" tempmin="-40"/>
+        <variant ordercode="ATtiny84V-10SSU" package="SOIC14" pinout="SOIC_14" tempmax="85" tempmin="-40"/>
+        <variant ordercode="ATtiny84-20MU" package="QFN20" pinout="QFN_20" tempmax="85" tempmin="-40"/>
     </variants>
     <device name="ATtiny84" architecture="AVR8" family="tinyAVR">
         <address-spaces>
@@ -37,10 +39,26 @@
                 <instance name="PORTA" caption="I/O Port">
                     <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTA" group="P" index="0" pad="PA0"/>
+                        <signal function="PORTA" group="P" index="1" pad="PA1"/>
+                        <signal function="PORTA" group="P" index="2" pad="PA2"/>
+                        <signal function="PORTA" group="P" index="3" pad="PA3"/>
+                        <signal function="PORTA" group="P" index="4" pad="PA4"/>
+                        <signal function="PORTA" group="P" index="5" pad="PA5"/>
+                        <signal function="PORTA" group="P" index="6" pad="PA6"/>
+                        <signal function="PORTA" group="P" index="7" pad="PA7"/>
+                    </signals>
                 </instance>
                 <instance name="PORTB" caption="I/O Port">
                     <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
                                     caption="I/O Port"/>
+                    <signals>
+                        <signal function="PORTB" group="P" index="0" pad="PB0"/>
+                        <signal function="PORTB" group="P" index="1" pad="PB1"/>
+                        <signal function="PORTB" group="P" index="2" pad="PB2"/>
+                        <signal function="PORTB" group="P" index="3" pad="PB3"/>
+                    </signals>
                 </instance>
             </module>
             <module name="AC">
@@ -763,4 +781,62 @@
             </value-group>
         </module>
     </modules>
+    <pinouts>
+        <pinout name="SOIC_14">
+            <pin pad="VCC" position="1"/>
+            <pin pad="PB0" position="2"/>
+            <pin pad="PB1" position="3"/>
+            <pin pad="PB3" position="4"/>
+            <pin pad="PB2" position="5"/>
+            <pin pad="PA7" position="6"/>
+            <pin pad="PA6" position="7"/>
+            <pin pad="PA5" position="8"/>
+            <pin pad="PA4" position="9"/>
+            <pin pad="PA3" position="10"/>
+            <pin pad="PA2" position="11"/>
+            <pin pad="PA1" position="12"/>
+            <pin pad="PA0" position="13"/>
+            <pin pad="GND" position="14"/>
+        </pinout>
+        <pinout name="QFN_20">
+            <pin pad="PA4" position="1"/>
+            <pin pad="PA3" position="2"/>
+            <pin pad="PA2" position="3"/>
+            <pin pad="PA1" position="4"/>
+            <pin pad="PA0" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
+            <pin pad="GND" position="8"/>
+            <pin pad="VCC" position="9"/>
+            <pin pad="NC" position="10"/>
+            <pin pad="PB0" position="11"/>
+            <pin pad="PB1" position="12"/>
+            <pin pad="PB3" position="13"/>
+            <pin pad="PB2" position="14"/>
+            <pin pad="PA7" position="15"/>
+            <pin pad="PA6" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
+            <pin pad="PA5" position="20"/>
+        </pinout>
+        <pinout name="BGA_16">
+            <pin pad="NC" position="A1"/>
+            <pin pad="PA5" position="A2"/>
+            <pin pad="PA6" position="A3"/>
+            <pin pad="PB2" position="A4"/>
+            <pin pad="PA4" position="B1"/>
+            <pin pad="PA7" position="B2"/>
+            <pin pad="PB1" position="B3"/>
+            <pin pad="PB3" position="B4"/>
+            <pin pad="PA3" position="C1"/>
+            <pin pad="PA2" position="C2"/>
+            <pin pad="PA1" position="C3"/>
+            <pin pad="PB0" position="C4"/>
+            <pin pad="PA0" position="D1"/>
+            <pin pad="GND" position="D2"/>
+            <pin pad="GND" position="D3"/>
+            <pin pad="VCC" position="D4"/>
+        </pinout>
+    </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY841.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY841.xml
index 2a599414..0d367ec6 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY841.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY841.xml
@@ -1194,14 +1194,20 @@
             <pin pad="PA2" position="3"/>
             <pin pad="PA1" position="4"/>
             <pin pad="PA0" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
             <pin pad="GND" position="8"/>
             <pin pad="VCC" position="9"/>
+            <pin pad="NC" position="10"/>
             <pin pad="PB0" position="11"/>
             <pin pad="PB1" position="12"/>
             <pin pad="PB3" position="13"/>
             <pin pad="PB2" position="14"/>
             <pin pad="PA7" position="15"/>
             <pin pad="PA6" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
             <pin pad="PA5" position="20"/>
         </pinout>
     </pinouts>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84A.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84A.xml
index 05441ca0..88f3275d 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84A.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY84A.xml
@@ -871,17 +871,24 @@
             <pin pad="PA2" position="3"/>
             <pin pad="PA1" position="4"/>
             <pin pad="PA0" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
             <pin pad="GND" position="8"/>
             <pin pad="VCC" position="9"/>
+            <pin pad="NC" position="10"/>
             <pin pad="PB0" position="11"/>
             <pin pad="PB1" position="12"/>
             <pin pad="PB3" position="13"/>
             <pin pad="PB2" position="14"/>
             <pin pad="PA7" position="15"/>
             <pin pad="PA6" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
             <pin pad="PA5" position="20"/>
         </pinout>
         <pinout name="BGA_16">
+            <pin pad="NC" position="A1"/>
             <pin pad="PA5" position="A2"/>
             <pin pad="PA6" position="A3"/>
             <pin pad="PB2" position="A4"/>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY85.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY85.xml
index 01aa9c1c..30080f31 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY85.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY85.xml
@@ -882,12 +882,24 @@
         <pinout name="QFN_20">
             <pin pad="PB5" position="1"/>
             <pin pad="PB3" position="2"/>
+            <pin pad="NC" position="3"/>
+            <pin pad="NC" position="4"/>
             <pin pad="PB4" position="5"/>
+            <pin pad="NC" position="6"/>
+            <pin pad="NC" position="7"/>
             <pin pad="GND" position="8"/>
+            <pin pad="NC" position="9"/>
+            <pin pad="NC" position="10"/>
             <pin pad="PB0" position="11"/>
             <pin pad="PB1" position="12"/>
+            <pin pad="NC" position="13"/>
             <pin pad="PB2" position="14"/>
             <pin pad="VCC" position="15"/>
+            <pin pad="NC" position="16"/>
+            <pin pad="NC" position="17"/>
+            <pin pad="NC" position="18"/>
+            <pin pad="NC" position="19"/>
+            <pin pad="NC" position="20"/>
         </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861.xml
index 6b8ca382..a79b700f 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY861.xml
@@ -1004,26 +1004,38 @@
             <pin pad="PA0" position="20"/>
         </pinout>
         <pinout name="QFN_32">
-            <pin pad="PB3" position="2"/>
-            <pin pad="VCC" position="4"/>
-            <pin pad="GND" position="5"/>
-            <pin pad="PB4" position="7"/>
-            <pin pad="PB5" position="8"/>
-            <pin pad="PB6" position="10"/>
-            <pin pad="PB7" position="11"/>
-            <pin pad="PA7" position="13"/>
-            <pin pad="PA6" position="14"/>
-            <pin pad="PA5" position="15"/>
-            <pin pad="PA4" position="17"/>
-            <pin pad="AVCC" position="18"/>
-            <pin pad="AGND" position="21"/>
-            <pin pad="PA3" position="22"/>
-            <pin pad="PA2" position="23"/>
-            <pin pad="PA1" position="25"/>
-            <pin pad="PA0" position="26"/>
-            <pin pad="PB0" position="30"/>
-            <pin pad="PB1" position="31"/>
-            <pin pad="PB2" position="32"/>
+            <pin position="1" pad="NC"/>
+            <pin position="2" pad="PB3"/>
+            <pin position="3" pad="NC"/>
+            <pin position="4" pad="VCC"/>
+            <pin position="5" pad="GND"/>
+            <pin position="6" pad="NC"/>
+            <pin position="7" pad="PB4"/>
+            <pin position="8" pad="PB5"/>
+            <pin position="9" pad="NC"/>
+            <pin position="10" pad="PB6"/>
+            <pin position="11" pad="PB7"/>
+            <pin position="12" pad="NC"/>
+            <pin position="13" pad="PA7"/>
+            <pin position="14" pad="PA6"/>
+            <pin position="15" pad="PA5"/>
+            <pin position="16" pad="NC"/>
+            <pin position="17" pad="PA4"/>
+            <pin position="18" pad="AVCC"/>
+            <pin position="19" pad="NC"/>
+            <pin position="20" pad="NC"/>
+            <pin position="21" pad="AGND"/>
+            <pin position="22" pad="PA3"/>
+            <pin position="23" pad="PA2"/>
+            <pin position="24" pad="NC"/>
+            <pin position="25" pad="PA1"/>
+            <pin position="26" pad="PA0"/>
+            <pin position="27" pad="NC"/>
+            <pin position="28" pad="NC"/>
+            <pin position="29" pad="NC"/>
+            <pin position="30" pad="PB0"/>
+            <pin position="31" pad="PB1"/>
+            <pin position="32" pad="PB2"/>
         </pinout>
     </pinouts>
 </target-description-file>
diff --git a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY88.xml b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY88.xml
index 221ec36b..dc4da540 100644
--- a/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY88.xml
+++ b/src/Targets/TargetDescriptionFiles/AVR8/TINY/ATTINY88.xml
@@ -6,13 +6,13 @@
         <variant ordercode="ATtiny88-MMH" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
                  package="QFN28" pinout="QFN28"/>
         <variant ordercode="ATtiny88-PU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="PDIP28" pinout="PDIP"/>
+                 package="PDIP28" pinout="PDIP28"/>
         <variant ordercode="ATtiny88-AU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="TQFP32" pinout="TQFP32_QFN32"/>
+                 package="TQFP32" pinout="TQFP_QFN_32"/>
         <variant ordercode="ATtiny88-CCU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="UFBGA32" pinout="UFBGA"/>
+                 package="UFBGA32" pinout="UFBGA32"/>
         <variant ordercode="ATtiny88-MU" speedmax="12000000" tempmin="-40" tempmax="85" vccmin="1.8" vccmax="5.5"
-                 package="QFN32" pinout="TQFP32_QFN32"/>
+                 package="QFN32" pinout="TQFP_QFN_32"/>
     </variants>
     <device name="ATtiny88" architecture="AVR8" family="tinyAVR">
         <address-spaces>
@@ -941,7 +941,7 @@
         </module>
     </modules>
     <pinouts>
-        <pinout name="TQFP32_QFN32">
+        <pinout name="TQFP_QFN_32">
             <pin pad="PD3" position="1"/>
             <pin pad="PD4" position="2"/>
             <pin pad="PA2" position="3"/>
@@ -975,7 +975,7 @@
             <pin pad="PD1" position="31"/>
             <pin pad="PD2" position="32"/>
         </pinout>
-        <pinout name="PDIP">
+        <pinout name="PDIP28">
             <pin pad="PC6" position="1"/>
             <pin pad="PD0" position="2"/>
             <pin pad="PD1" position="3"/>
@@ -1035,7 +1035,7 @@
             <pin pad="PD1" position="27"/>
             <pin pad="PD2" position="28"/>
         </pinout>
-        <pinout name="UFBGA">
+        <pinout name="UFBGA32">
             <pin pad="PD2" position="A1"/>
             <pin pad="PD3" position="B1"/>
             <pin pad="GND" position="C1"/>