More TDF corrections

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2021-06-10 00:06:46 +01:00
parent 213506d136
commit 01ce8dd5a4
5 changed files with 387 additions and 5 deletions

View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<target-description-file> <target-description-file>
<variants> <variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/> <variant ordercode="ATtiny1634-SU" package="SOIC20" pinout="SOIC_20" tempmax="85" tempmin="-40"/>
<variant ordercode="ATtiny1634-MU" package="WQFN20" pinout="QFN_20" tempmax="85" tempmin="-40"/>
</variants> </variants>
<device name="ATtiny1634" architecture="AVR8" family="tinyAVR"> <device name="ATtiny1634" architecture="AVR8" family="tinyAVR">
<address-spaces> <address-spaces>
@@ -40,14 +41,38 @@
<instance name="PORTB" caption="I/O Port"> <instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
</signals>
</instance> </instance>
<instance name="PORTC" caption="I/O Port"> <instance name="PORTC" caption="I/O Port">
<register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data" <register-group name="PORTC" name-in-module="PORTC" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal function="PORTC" group="P" index="0" pad="PC0"/>
<signal function="PORTC" group="P" index="1" pad="PC1"/>
<signal function="PORTC" group="P" index="2" pad="PC2"/>
<signal function="PORTC" group="P" index="3" pad="PC3"/>
<signal function="PORTC" group="P" index="4" pad="PC4"/>
<signal function="PORTC" group="P" index="5" pad="PC5"/>
</signals>
</instance> </instance>
<instance name="PORTA" caption="I/O Port"> <instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance> </instance>
</module> </module>
<module name="ADC"> <module name="ADC">
@@ -932,4 +957,50 @@
</value-group> </value-group>
</module> </module>
</modules> </modules>
<pinouts>
<pinout name="SOIC_20">
<pin pad="PB0" position="1"/>
<pin pad="PA7" position="2"/>
<pin pad="PA6" position="3"/>
<pin pad="PA5" position="4"/>
<pin pad="PA4" position="5"/>
<pin pad="PA3" position="6"/>
<pin pad="PA2" position="7"/>
<pin pad="PA1" position="8"/>
<pin pad="PA0" position="9"/>
<pin pad="GND" position="10"/>
<pin pad="VCC" position="11"/>
<pin pad="PC5" position="12"/>
<pin pad="PC4" position="13"/>
<pin pad="PC3" position="14"/>
<pin pad="PC2" position="15"/>
<pin pad="PC1" position="16"/>
<pin pad="PC0" position="17"/>
<pin pad="PB3" position="18"/>
<pin pad="PB2" position="19"/>
<pin pad="PB1" position="20"/>
</pinout>
<pinout name="QFN_20">
<pin pad="PA6" position="1"/>
<pin pad="PA5" position="2"/>
<pin pad="PA4" position="3"/>
<pin pad="PA3" position="4"/>
<pin pad="PA2" position="5"/>
<pin pad="PA1" position="6"/>
<pin pad="PA0" position="7"/>
<pin pad="GND" position="8"/>
<pin pad="VCC" position="9"/>
<pin pad="PC5" position="10"/>
<pin pad="PC4" position="11"/>
<pin pad="PC3" position="12"/>
<pin pad="PC2" position="13"/>
<pin pad="PC1" position="14"/>
<pin pad="PC0" position="15"/>
<pin pad="PB3" position="16"/>
<pin pad="PB2" position="17"/>
<pin pad="PB1" position="18"/>
<pin pad="PB0" position="19"/>
<pin pad="PA7" position="20"/>
</pinout>
</pinouts>
</target-description-file> </target-description-file>

View File

@@ -1,7 +1,9 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<target-description-file> <target-description-file>
<variants> <variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/> <variant ordercode="ATtiny167-SU" tempmin="-40" tempmax="85" pinout="SOIC20" package="SOIC20"/>
<variant ordercode="ATtiny167-MU" tempmin="-40" tempmax="85" pinout="VQFN32" package="VQFN32"/>
<variant ordercode="ATtiny167-MMU" tempmin="-40" tempmax="85" pinout="QFN20" package="QFN20"/>
</variants> </variants>
<device name="ATtiny167" architecture="AVR8" family="tinyAVR"> <device name="ATtiny167" architecture="AVR8" family="tinyAVR">
<address-spaces> <address-spaces>
@@ -37,10 +39,30 @@
<instance name="PORTA" caption="I/O Port"> <instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal group="P" function="default" pad="PA0" index="0"/>
<signal group="P" function="default" pad="PA1" index="1"/>
<signal group="P" function="default" pad="PA2" index="2"/>
<signal group="P" function="default" pad="PA3" index="3"/>
<signal group="P" function="default" pad="PA4" index="4"/>
<signal group="P" function="default" pad="PA5" index="5"/>
<signal group="P" function="default" pad="PA6" index="6"/>
<signal group="P" function="default" pad="PA7" index="7"/>
</signals>
</instance> </instance>
<instance name="PORTB" caption="I/O Port"> <instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal group="P" function="default" pad="PB0" index="0"/>
<signal group="P" function="default" pad="PB1" index="1"/>
<signal group="P" function="default" pad="PB2" index="2"/>
<signal group="P" function="default" pad="PB3" index="3"/>
<signal group="P" function="default" pad="PB4" index="4"/>
<signal group="P" function="default" pad="PB5" index="5"/>
<signal group="P" function="default" pad="PB6" index="6"/>
<signal group="P" function="default" pad="PB7" index="7"/>
</signals>
</instance> </instance>
</module> </module>
<module name="LINUART"> <module name="LINUART">
@@ -987,4 +1009,84 @@
</value-group> </value-group>
</module> </module>
</modules> </modules>
<pinouts>
<pinout name="SOIC20">
<pin position="1" pad="PA0"/>
<pin position="2" pad="PA1"/>
<pin position="3" pad="PA2"/>
<pin position="4" pad="PA3"/>
<pin position="5" pad="AVCC"/>
<pin position="6" pad="AGND"/>
<pin position="7" pad="PA4"/>
<pin position="8" pad="PA5"/>
<pin position="9" pad="PA6"/>
<pin position="10" pad="PA7"/>
<pin position="11" pad="PB7"/>
<pin position="12" pad="PB6"/>
<pin position="13" pad="PB5"/>
<pin position="14" pad="PB4"/>
<pin position="15" pad="VCC"/>
<pin position="16" pad="GND"/>
<pin position="17" pad="PB3"/>
<pin position="18" pad="PB2"/>
<pin position="19" pad="PB1"/>
<pin position="20" pad="PB0"/>
</pinout>
<pinout name="QFN20">
<pin position="1" pad="PA2"/>
<pin position="2" pad="PA3"/>
<pin position="3" pad="AVCC"/>
<pin position="4" pad="AGND"/>
<pin position="5" pad="PA4"/>
<pin position="6" pad="PA5"/>
<pin position="7" pad="PA6"/>
<pin position="8" pad="PA7"/>
<pin position="9" pad="PB7"/>
<pin position="10" pad="PB6"/>
<pin position="11" pad="PB5"/>
<pin position="12" pad="PB4"/>
<pin position="13" pad="VCC"/>
<pin position="14" pad="GND"/>
<pin position="15" pad="PB3"/>
<pin position="16" pad="PB2"/>
<pin position="17" pad="PB1"/>
<pin position="18" pad="PB0"/>
<pin position="19" pad="PA0"/>
<pin position="20" pad="PA1"/>
</pinout>
<pinout name="VQFN32">
<pin position="1" pad="NC"/>
<pin position="2" pad="NC"/>
<pin position="3" pad="PA3"/>
<pin position="4" pad="AVCC"/>
<pin position="5" pad="AGND"/>
<pin position="6" pad="NC"/>
<pin position="7" pad="NC"/>
<pin position="8" pad="NC"/>
<pin position="9" pad="PA4"/>
<pin position="10" pad="PA5"/>
<pin position="11" pad="PA6"/>
<pin position="12" pad="PA7"/>
<pin position="13" pad="NC"/>
<pin position="14" pad="PB7"/>
<pin position="15" pad="PB6"/>
<pin position="16" pad="NC"/>
<pin position="17" pad="NC"/>
<pin position="18" pad="PB5"/>
<pin position="19" pad="PB4"/>
<pin position="20" pad="VCC"/>
<pin position="21" pad="GND"/>
<pin position="22" pad="NC"/>
<pin position="23" pad="NC"/>
<pin position="24" pad="NC"/>
<pin position="25" pad="PB3"/>
<pin position="26" pad="PB2"/>
<pin position="27" pad="PB1"/>
<pin position="28" pad="PB0"/>
<pin position="29" pad="PA0"/>
<pin position="30" pad="PA1"/>
<pin position="31" pad="PA2"/>
<pin position="32" pad="NC"/>
</pinout>
</pinouts>
</target-description-file> </target-description-file>

View File

@@ -1,7 +1,9 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<target-description-file> <target-description-file>
<variants> <variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/> <variant ordercode="ATtiny2313-20PU" tempmin="-40" tempmax="85" pinout="PDIP_SOIC_20" package="PDIP20"/>
<variant ordercode="ATtiny2313-20SU" tempmin="-40" tempmax="85" pinout="PDIP_SOIC_20" package="SOIC20"/>
<variant ordercode="ATtiny2313-20MUR" tempmin="-40" tempmax="85" pinout="QFN20" package="WQFN20"/>
</variants> </variants>
<device name="ATtiny2313" architecture="AVR8" family="tinyAVR"> <device name="ATtiny2313" architecture="AVR8" family="tinyAVR">
<address-spaces> <address-spaces>
@@ -37,14 +39,38 @@
<instance name="PORTB" caption="I/O Port"> <instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal group="P" function="default" pad="PB0" index="0"/>
<signal group="P" function="default" pad="PB1" index="1"/>
<signal group="P" function="default" pad="PB2" index="2"/>
<signal group="P" function="default" pad="PB3" index="3"/>
<signal group="P" function="default" pad="PB4" index="4"/>
<signal group="P" function="default" pad="PB5" index="5"/>
<signal group="P" function="default" pad="PB6" index="6"/>
<signal group="P" function="default" pad="PB7" index="7"/>
</signals>
</instance> </instance>
<instance name="PORTD" caption="I/O Port"> <instance name="PORTD" caption="I/O Port">
<register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data" <register-group name="PORTD" name-in-module="PORTD" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal group="P" function="default" pad="PD0" index="0"/>
<signal group="P" function="default" pad="PD1" index="1"/>
<signal group="P" function="default" pad="PD2" index="2"/>
<signal group="P" function="default" pad="PD3" index="3"/>
<signal group="P" function="default" pad="PD4" index="4"/>
<signal group="P" function="default" pad="PD5" index="5"/>
<signal group="P" function="default" pad="PD6" index="6"/>
</signals>
</instance> </instance>
<instance name="PORTA" caption="I/O Port"> <instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal group="P" function="default" pad="PA0" index="0"/>
<signal group="P" function="default" pad="PA1" index="1"/>
<signal group="P" function="default" pad="PA2" index="2"/>
</signals>
</instance> </instance>
</module> </module>
<module name="TC8"> <module name="TC8">
@@ -779,4 +805,50 @@
</value-group> </value-group>
</module> </module>
</modules> </modules>
<pinouts>
<pinout name="PDIP_SOIC_20">
<pin position="1" pad="PA2"/>
<pin position="2" pad="PD0"/>
<pin position="3" pad="PD1"/>
<pin position="4" pad="PA1"/>
<pin position="5" pad="PA0"/>
<pin position="6" pad="PD2"/>
<pin position="7" pad="PD3"/>
<pin position="8" pad="PD4"/>
<pin position="9" pad="PD5"/>
<pin position="10" pad="GND"/>
<pin position="11" pad="PD6"/>
<pin position="12" pad="PB0"/>
<pin position="13" pad="PB1"/>
<pin position="14" pad="PB2"/>
<pin position="15" pad="PB3"/>
<pin position="16" pad="PB4"/>
<pin position="17" pad="PB5"/>
<pin position="18" pad="PB6"/>
<pin position="19" pad="PB7"/>
<pin position="20" pad="VCC"/>
</pinout>
<pinout name="QFN20">
<pin position="1" pad="PD1"/>
<pin position="2" pad="PA1"/>
<pin position="3" pad="PA0"/>
<pin position="4" pad="PD2"/>
<pin position="5" pad="PD3"/>
<pin position="6" pad="PD4"/>
<pin position="7" pad="PD5"/>
<pin position="8" pad="GND"/>
<pin position="9" pad="PD6"/>
<pin position="10" pad="PB0"/>
<pin position="11" pad="PB1"/>
<pin position="12" pad="PB2"/>
<pin position="13" pad="PB3"/>
<pin position="14" pad="PB4"/>
<pin position="15" pad="PB5"/>
<pin position="16" pad="PB6"/>
<pin position="17" pad="PB7"/>
<pin position="18" pad="VCC"/>
<pin position="19" pad="PA2"/>
<pin position="20" pad="PD0"/>
</pinout>
</pinouts>
</target-description-file> </target-description-file>

View File

@@ -1,7 +1,9 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<target-description-file> <target-description-file>
<variants> <variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/> <variant ordercode="ATtiny44-20PU" package="PDIP14" pinout="SOIC_14" tempmax="85" tempmin="-40"/>
<variant ordercode="ATtiny44-20SSU" package="SOIC14" pinout="SOIC_14" tempmax="85" tempmin="-40"/>
<variant ordercode="ATtiny44-20MU" package="WQFN20" pinout="QFN_20" tempmax="85" tempmin="-40"/>
</variants> </variants>
<device name="ATtiny44" architecture="AVR8" family="tinyAVR"> <device name="ATtiny44" architecture="AVR8" family="tinyAVR">
<address-spaces> <address-spaces>
@@ -37,10 +39,26 @@
<instance name="PORTA" caption="I/O Port"> <instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal function="PORTA" group="P" index="0" pad="PA0"/>
<signal function="PORTA" group="P" index="1" pad="PA1"/>
<signal function="PORTA" group="P" index="2" pad="PA2"/>
<signal function="PORTA" group="P" index="3" pad="PA3"/>
<signal function="PORTA" group="P" index="4" pad="PA4"/>
<signal function="PORTA" group="P" index="5" pad="PA5"/>
<signal function="PORTA" group="P" index="6" pad="PA6"/>
<signal function="PORTA" group="P" index="7" pad="PA7"/>
</signals>
</instance> </instance>
<instance name="PORTB" caption="I/O Port"> <instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal function="PORTB" group="P" index="0" pad="PB0"/>
<signal function="PORTB" group="P" index="1" pad="PB1"/>
<signal function="PORTB" group="P" index="2" pad="PB2"/>
<signal function="PORTB" group="P" index="3" pad="PB3"/>
</signals>
</instance> </instance>
</module> </module>
<module name="AC"> <module name="AC">
@@ -763,4 +781,44 @@
</value-group> </value-group>
</module> </module>
</modules> </modules>
<pinouts>
<pinout name="SOIC_14">
<pin pad="VCC" position="1"/>
<pin pad="PB0" position="2"/>
<pin pad="PB1" position="3"/>
<pin pad="PB3" position="4"/>
<pin pad="PB2" position="5"/>
<pin pad="PA7" position="6"/>
<pin pad="PA6" position="7"/>
<pin pad="PA5" position="8"/>
<pin pad="PA4" position="9"/>
<pin pad="PA3" position="10"/>
<pin pad="PA2" position="11"/>
<pin pad="PA1" position="12"/>
<pin pad="PA0" position="13"/>
<pin pad="GND" position="14"/>
</pinout>
<pinout name="QFN_20">
<pin pad="PA4" position="1"/>
<pin pad="PA3" position="2"/>
<pin pad="PA2" position="3"/>
<pin pad="PA1" position="4"/>
<pin pad="PA0" position="5"/>
<pin pad="NC" position="6"/>
<pin pad="NC" position="7"/>
<pin pad="GND" position="8"/>
<pin pad="VCC" position="9"/>
<pin pad="NC" position="10"/>
<pin pad="PB0" position="11"/>
<pin pad="PB1" position="12"/>
<pin pad="PB3" position="13"/>
<pin pad="PB2" position="14"/>
<pin pad="PA7" position="15"/>
<pin pad="PA6" position="16"/>
<pin pad="NC" position="17"/>
<pin pad="NC" position="18"/>
<pin pad="NC" position="19"/>
<pin pad="PA5" position="20"/>
</pinout>
</pinouts>
</target-description-file> </target-description-file>

View File

@@ -1,7 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<target-description-file> <target-description-file>
<variants> <variants>
<variant tempmin="0" tempmax="0" speedmax="0" package="" ordercode="standard" vccmin="1.8" vccmax="5.5"/> <variant ordercode="ATtiny87-SU" tempmin="-40" tempmax="85" pinout="SOIC20" package="SOIC20"/>
<variant ordercode="ATtiny87-MU" tempmin="-40" tempmax="85" pinout="VQFN32" package="VQFN32"/>
</variants> </variants>
<device name="ATtiny87" architecture="AVR8" family="tinyAVR"> <device name="ATtiny87" architecture="AVR8" family="tinyAVR">
<address-spaces> <address-spaces>
@@ -37,10 +38,30 @@
<instance name="PORTA" caption="I/O Port"> <instance name="PORTA" caption="I/O Port">
<register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data" <register-group name="PORTA" name-in-module="PORTA" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal group="P" function="default" pad="PA0" index="0"/>
<signal group="P" function="default" pad="PA1" index="1"/>
<signal group="P" function="default" pad="PA2" index="2"/>
<signal group="P" function="default" pad="PA3" index="3"/>
<signal group="P" function="default" pad="PA4" index="4"/>
<signal group="P" function="default" pad="PA5" index="5"/>
<signal group="P" function="default" pad="PA6" index="6"/>
<signal group="P" function="default" pad="PA7" index="7"/>
</signals>
</instance> </instance>
<instance name="PORTB" caption="I/O Port"> <instance name="PORTB" caption="I/O Port">
<register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data" <register-group name="PORTB" name-in-module="PORTB" offset="0x00" address-space="data"
caption="I/O Port"/> caption="I/O Port"/>
<signals>
<signal group="P" function="default" pad="PB0" index="0"/>
<signal group="P" function="default" pad="PB1" index="1"/>
<signal group="P" function="default" pad="PB2" index="2"/>
<signal group="P" function="default" pad="PB3" index="3"/>
<signal group="P" function="default" pad="PB4" index="4"/>
<signal group="P" function="default" pad="PB5" index="5"/>
<signal group="P" function="default" pad="PB6" index="6"/>
<signal group="P" function="default" pad="PB7" index="7"/>
</signals>
</instance> </instance>
</module> </module>
<module name="LINUART"> <module name="LINUART">
@@ -987,4 +1008,62 @@
</value-group> </value-group>
</module> </module>
</modules> </modules>
<pinouts>
<pinout name="SOIC20">
<pin position="1" pad="PA0"/>
<pin position="2" pad="PA1"/>
<pin position="3" pad="PA2"/>
<pin position="4" pad="PA3"/>
<pin position="5" pad="AVCC"/>
<pin position="6" pad="AGND"/>
<pin position="7" pad="PA4"/>
<pin position="8" pad="PA5"/>
<pin position="9" pad="PA6"/>
<pin position="10" pad="PA7"/>
<pin position="11" pad="PB7"/>
<pin position="12" pad="PB6"/>
<pin position="13" pad="PB5"/>
<pin position="14" pad="PB4"/>
<pin position="15" pad="VCC"/>
<pin position="16" pad="GND"/>
<pin position="17" pad="PB3"/>
<pin position="18" pad="PB2"/>
<pin position="19" pad="PB1"/>
<pin position="20" pad="PB0"/>
</pinout>
<pinout name="VQFN32">
<pin position="1" pad="NC"/>
<pin position="2" pad="NC"/>
<pin position="3" pad="PA3"/>
<pin position="4" pad="AVCC"/>
<pin position="5" pad="AGND"/>
<pin position="6" pad="NC"/>
<pin position="7" pad="NC"/>
<pin position="8" pad="NC"/>
<pin position="9" pad="PA4"/>
<pin position="10" pad="PA5"/>
<pin position="11" pad="PA6"/>
<pin position="12" pad="PA7"/>
<pin position="13" pad="NC"/>
<pin position="14" pad="PB7"/>
<pin position="15" pad="PB6"/>
<pin position="16" pad="NC"/>
<pin position="17" pad="NC"/>
<pin position="18" pad="PB5"/>
<pin position="19" pad="PB4"/>
<pin position="20" pad="VCC"/>
<pin position="21" pad="GND"/>
<pin position="22" pad="NC"/>
<pin position="23" pad="NC"/>
<pin position="24" pad="NC"/>
<pin position="25" pad="PB3"/>
<pin position="26" pad="PB2"/>
<pin position="27" pad="PB1"/>
<pin position="28" pad="PB0"/>
<pin position="29" pad="PA0"/>
<pin position="30" pad="PA1"/>
<pin position="31" pad="PA2"/>
<pin position="32" pad="NC"/>
</pinout>
</pinouts>
</target-description-file> </target-description-file>