2023-08-13 16:24:43 +01:00
<?xml version="1.0" encoding="UTF-8"?>
2024-02-09 00:03:15 +00:00
<device name= "AVR16DD32" family= "AVR8" configuration-value= "avr16dd32" architecture= "AVR8X" avr-family= "DD" >
<property-groups >
<property-group key= "ocd_features" >
<property key= "break_pin" value= "PF6" />
<property key= "break_pin_alt" value= "PF2" />
</property-group>
<property-group key= "programming_info" >
<property key= "fuse_enabled_value" value= "1" />
</property-group>
<property-group key= "updi_interface" >
<property key= "ocd_base_addr" value= "0x00000F80" />
<property key= "hv_implementation" value= "2" />
<property key= "progmem_offset" value= "0x00800000" />
</property-group>
<property-group key= "signatures" >
<property key= "signature0" value= "0x1E" />
<property key= "signature1" value= "0x94" />
<property key= "signature2" value= "0x31" />
</property-group>
</property-groups>
<address-spaces >
2024-04-04 22:48:02 +01:00
<address-space key= "register_file" start= "0x00000000" size= "32" endianness= "little" >
2024-04-29 20:25:36 +01:00
<memory-segment key= "gp_registers" name= "General Purpose Registers" type= "gp_registers" start= "0x00000000" size= "32" executable= "0" />
2024-04-04 22:48:02 +01:00
</address-space>
2024-02-09 00:03:15 +00:00
<address-space key= "data" start= "0x00000000" size= "65536" endianness= "little" >
2024-04-29 20:25:36 +01:00
<memory-segment key= "io" name= "Input/Output" type= "io" start= "0x00000000" size= "4159" access= "RW" executable= "0" />
<memory-segment key= "lockbits" name= "Lockbits" type= "lockbits" start= "0x00001040" size= "4" page-size= "1" access= "RW" executable= "0" />
<memory-segment key= "fuses" name= "Fuses" type= "fuses" start= "0x00001050" size= "16" page-size= "1" access= "RW" executable= "0" />
<memory-segment key= "user_signatures" name= "User Signatures" type= "user_signatures" start= "0x00001080" size= "32" page-size= "32" access= "RW" executable= "0" />
<memory-segment key= "signatures" name= "Signatures" type= "signatures" start= "0x00001100" size= "3" page-size= "128" access= "R" executable= "0" />
<memory-segment key= "prod_signatures" name= "Production Signatures" type= "production_signatures" start= "0x00001103" size= "125" page-size= "128" access= "R" executable= "0" />
<memory-segment key= "internal_eeprom" name= "Internal EEPROM" type= "eeprom" start= "0x00001400" size= "256" page-size= "1" access= "RW" executable= "0" />
<memory-segment key= "internal_ram" name= "Internal RAM" type= "ram" start= "0x00007800" size= "2048" access= "RW" executable= "0" />
<memory-segment key= "mapped_progmem" name= "MAPPED_PROGMEM" type= "aliased" start= "0x00008000" size= "16384" page-size= "512" access= "RW" executable= "0" />
2024-02-09 00:03:15 +00:00
</address-space>
<address-space key= "prog" start= "0x00000000" size= "16384" endianness= "little" >
2024-04-29 20:25:36 +01:00
<memory-segment key= "internal_program_memory" name= "Internal FLASH" type= "flash" start= "0x00000000" size= "16384" page-size= "512" access= "RW" executable= "1" />
2024-02-09 00:03:15 +00:00
</address-space>
</address-spaces>
<physical-interfaces >
2024-07-06 01:33:19 +01:00
<physical-interface value= "updi" />
2024-02-09 00:03:15 +00:00
</physical-interfaces>
<peripherals >
<peripheral key= "ac0" name= "AC0" module-key= "cmp_control_v8" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "ac" address-space-key= "data" offset= "0x680" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pd3" index= "0" function= "AC0" group= "N" />
<signal pad-id= "pd7" index= "2" function= "AC0" group= "N" />
<signal pad-id= "pc2" index= "3" function= "AC0" group= "N" />
<signal pad-id= "pd2" index= "0" function= "AC0" group= "P" />
<signal pad-id= "pd6" index= "3" function= "AC0" group= "P" />
<signal pad-id= "pc3" index= "4" function= "AC0" group= "P" />
<signal pad-id= "pa7" index= "0" function= "AC0" group= "OUT" field= "PORTMUX.ACROUTEA.AC0" />
</signals>
</peripheral>
<peripheral key= "adc0" name= "ADC0" module-key= "adc_12b_diff_ctrl_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "adc" address-space-key= "data" offset= "0x600" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pd1" index= "1" function= "AIN0" group= "AIN" />
<signal pad-id= "pd2" index= "2" function= "AIN0" group= "AIN" />
<signal pad-id= "pd3" index= "3" function= "AIN0" group= "AIN" />
<signal pad-id= "pd4" index= "4" function= "AIN0" group= "AIN" />
<signal pad-id= "pd5" index= "5" function= "AIN0" group= "AIN" />
<signal pad-id= "pd6" index= "6" function= "AIN0" group= "AIN" />
<signal pad-id= "pd7" index= "7" function= "AIN0" group= "AIN" />
<signal pad-id= "pf0" index= "16" function= "AIN0" group= "AIN" />
<signal pad-id= "pf1" index= "17" function= "AIN0" group= "AIN" />
<signal pad-id= "pf2" index= "18" function= "AIN0" group= "AIN" />
<signal pad-id= "pf3" index= "19" function= "AIN0" group= "AIN" />
<signal pad-id= "pf4" index= "20" function= "AIN0" group= "AIN" />
<signal pad-id= "pf5" index= "21" function= "AIN0" group= "AIN" />
<signal pad-id= "pa2" index= "22" function= "AIN0" group= "AIN" />
<signal pad-id= "pa3" index= "23" function= "AIN0" group= "AIN" />
<signal pad-id= "pa4" index= "24" function= "AIN0" group= "AIN" />
<signal pad-id= "pa5" index= "25" function= "AIN0" group= "AIN" />
<signal pad-id= "pa6" index= "26" function= "AIN0" group= "AIN" />
<signal pad-id= "pa7" index= "27" function= "AIN0" group= "AIN" />
<signal pad-id= "pc0" index= "28" function= "AIN0" group= "AIN" />
<signal pad-id= "pc1" index= "29" function= "AIN0" group= "AIN" />
<signal pad-id= "pc2" index= "30" function= "AIN0" group= "AIN" />
<signal pad-id= "pc3" index= "31" function= "AIN0" group= "AIN" />
</signals>
</peripheral>
<peripheral key= "bod" name= "BOD" module-key= "bor_lvd_ctrl_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "bod" address-space-key= "data" offset= "0xA0" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "ccl" name= "CCL" module-key= "cla_ccl_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "ccl" address-space-key= "data" offset= "0x1C0" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa0" index= "0" function= "CCL" group= "LUT0_IN" field= "PORTMUX.CCLROUTEA.LUT0" />
<signal pad-id= "pa1" index= "1" function= "CCL" group= "LUT0_IN" field= "PORTMUX.CCLROUTEA.LUT0" />
<signal pad-id= "pa2" index= "2" function= "CCL" group= "LUT0_IN" field= "PORTMUX.CCLROUTEA.LUT0" />
<signal pad-id= "pa3" index= "0" function= "CCL" group= "LUT0_OUT" field= "PORTMUX.CCLROUTEA.LUT0" />
<signal pad-id= "pa0" index= "0" function= "CCL_ALT1" group= "LUT0_IN" field= "PORTMUX.CCLROUTEA.LUT0" />
<signal pad-id= "pa1" index= "1" function= "CCL_ALT1" group= "LUT0_IN" field= "PORTMUX.CCLROUTEA.LUT0" />
<signal pad-id= "pa2" index= "2" function= "CCL_ALT1" group= "LUT0_IN" field= "PORTMUX.CCLROUTEA.LUT0" />
<signal pad-id= "pa6" index= "0" function= "CCL_ALT1" group= "LUT0_OUT" field= "PORTMUX.CCLROUTEA.LUT0" />
<signal pad-id= "pc0" index= "0" function= "CCL" group= "LUT1_IN" field= "PORTMUX.CCLROUTEA.LUT1" />
<signal pad-id= "pc1" index= "1" function= "CCL" group= "LUT1_IN" field= "PORTMUX.CCLROUTEA.LUT1" />
<signal pad-id= "pc2" index= "2" function= "CCL" group= "LUT1_IN" field= "PORTMUX.CCLROUTEA.LUT1" />
<signal pad-id= "pc3" index= "0" function= "CCL" group= "LUT1_OUT" field= "PORTMUX.CCLROUTEA.LUT1" />
<signal pad-id= "pc0" index= "0" function= "CCL_ALT1" group= "LUT1_IN" field= "PORTMUX.CCLROUTEA.LUT1" />
<signal pad-id= "pc1" index= "1" function= "CCL_ALT1" group= "LUT1_IN" field= "PORTMUX.CCLROUTEA.LUT1" />
<signal pad-id= "pc2" index= "2" function= "CCL_ALT1" group= "LUT1_IN" field= "PORTMUX.CCLROUTEA.LUT1" />
<signal pad-id= "pd1" index= "1" function= "CCL" group= "LUT2_IN" field= "PORTMUX.CCLROUTEA.LUT2" />
<signal pad-id= "pd2" index= "2" function= "CCL" group= "LUT2_IN" field= "PORTMUX.CCLROUTEA.LUT2" />
<signal pad-id= "pd3" index= "0" function= "CCL" group= "LUT2_OUT" field= "PORTMUX.CCLROUTEA.LUT2" />
<signal pad-id= "pd1" index= "1" function= "CCL_ALT1" group= "LUT2_IN" field= "PORTMUX.CCLROUTEA.LUT2" />
<signal pad-id= "pd2" index= "2" function= "CCL_ALT1" group= "LUT2_IN" field= "PORTMUX.CCLROUTEA.LUT2" />
<signal pad-id= "pd6" index= "0" function= "CCL_ALT1" group= "LUT2_OUT" field= "PORTMUX.CCLROUTEA.LUT2" />
<signal pad-id= "pf0" index= "0" function= "CCL" group= "LUT3_IN" field= "PORTMUX.CCLROUTEA.LUT3" />
<signal pad-id= "pf1" index= "1" function= "CCL" group= "LUT3_IN" field= "PORTMUX.CCLROUTEA.LUT3" />
<signal pad-id= "pf2" index= "2" function= "CCL" group= "LUT3_IN" field= "PORTMUX.CCLROUTEA.LUT3" />
<signal pad-id= "pf3" index= "0" function= "CCL" group= "LUT3_OUT" field= "PORTMUX.CCLROUTEA.LUT3" />
</signals>
</peripheral>
<peripheral key= "clkctrl" name= "CLKCTRL" module-key= "avrdd_clkctrl" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "clkctrl" address-space-key= "data" offset= "0x60" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa7" function= "CLKCTRL" group= "CLKOUT" />
<signal pad-id= "pa0" function= "CLKCTRL" group= "EXTCLK" />
<signal pad-id= "pf0" function= "CLKCTRL" group= "XTAL32K1" />
<signal pad-id= "pf1" function= "CLKCTRL" group= "XTAL32K2" />
<signal pad-id= "pa0" function= "CLKCTRL" group= "XTALHF1" />
<signal pad-id= "pa1" function= "CLKCTRL" group= "XTALHF2" />
<signal pad-id= "pa0" function= "CLKCTRL_ALT1" group= "XTAL32K1" />
<signal pad-id= "pa1" function= "CLKCTRL_ALT1" group= "XTAL32K2" />
</signals>
</peripheral>
<peripheral key= "cpu" name= "CPU" module-key= "cpu_avr_xt_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "cpu" address-space-key= "data" offset= "0x30" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "cpuint" name= "CPUINT" module-key= "int_8bit_v3" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "cpuint" address-space-key= "data" offset= "0x110" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "crcscan" name= "CRCSCAN" module-key= "math_pdi_crc_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "crcscan" address-space-key= "data" offset= "0x120" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "dac0" name= "DAC0" module-key= "dac_nbit_ctrl_v5" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "dac" address-space-key= "data" offset= "0x6A0" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pd6" index= "0" function= "DAC0" group= "OUT" />
</signals>
</peripheral>
<peripheral key= "evsys" name= "EVSYS" module-key= "avrdd_evsys" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "evsys" address-space-key= "data" offset= "0x200" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa2" index= "0" function= "EVSYS" group= "EVOUT" field= "PORTMUX.EVSYSROUTEA.EVOUTA" />
<signal pad-id= "pa7" index= "0" function= "EVSYS_ALT1" group= "EVOUT" field= "PORTMUX.EVSYSROUTEA.EVOUTA" />
<signal pad-id= "pc2" index= "2" function= "EVSYS" group= "EVOUT" field= "PORTMUX.EVSYSROUTEA.EVOUTC" />
<signal pad-id= "pd2" index= "3" function= "EVSYS" group= "EVOUT" field= "PORTMUX.EVSYSROUTEA.EVOUTD" />
<signal pad-id= "pd7" index= "3" function= "EVSYS_ALT1" group= "EVOUT" field= "PORTMUX.EVSYSROUTEA.EVOUTD" />
<signal pad-id= "pf2" index= "5" function= "EVSYS" group= "EVOUT" field= "PORTMUX.EVSYSROUTEA.EVOUTF" />
<signal pad-id= "pf7" index= "5" function= "EVSYS_ALT1" group= "EVOUT" field= "PORTMUX.EVSYSROUTEA.EVOUTF" />
</signals>
</peripheral>
<peripheral key= "fuse" name= "FUSE" module-key= "avrdd_fuse" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "fuse" address-space-key= "data" offset= "0x1050" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "gpr" name= "GPR" module-key= "avrdd_gpr" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "gpr" address-space-key= "data" offset= "0x1C" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "lock" name= "LOCK" module-key= "avrdd_lock" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "lock" address-space-key= "data" offset= "0x1040" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "mvio" name= "MVIO" module-key= "io_multiv_ctrl_avr_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "mvio" address-space-key= "data" offset= "0xC0" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "nvmctrl" name= "NVMCTRL" module-key= "nvm_ctrl_avr_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "nvmctrl" address-space-key= "data" offset= "0x1000" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "porta" name= "PORTA" module-key= "gpio_port" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "port" address-space-key= "data" offset= "0x400" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa0" index= "0" function= "IOPORT" group= "PIN" />
<signal pad-id= "pa1" index= "1" function= "IOPORT" group= "PIN" />
<signal pad-id= "pa2" index= "2" function= "IOPORT" group= "PIN" />
<signal pad-id= "pa3" index= "3" function= "IOPORT" group= "PIN" />
<signal pad-id= "pa4" index= "4" function= "IOPORT" group= "PIN" />
<signal pad-id= "pa5" index= "5" function= "IOPORT" group= "PIN" />
<signal pad-id= "pa6" index= "6" function= "IOPORT" group= "PIN" />
<signal pad-id= "pa7" index= "7" function= "IOPORT" group= "PIN" />
</signals>
</peripheral>
<peripheral key= "portc" name= "PORTC" module-key= "gpio_port" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "port" address-space-key= "data" offset= "0x440" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pc0" index= "0" function= "IOPORT" group= "PIN" />
<signal pad-id= "pc1" index= "1" function= "IOPORT" group= "PIN" />
<signal pad-id= "pc2" index= "2" function= "IOPORT" group= "PIN" />
<signal pad-id= "pc3" index= "3" function= "IOPORT" group= "PIN" />
</signals>
</peripheral>
<peripheral key= "portd" name= "PORTD" module-key= "gpio_port" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "port" address-space-key= "data" offset= "0x460" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pd1" index= "1" function= "IOPORT" group= "PIN" />
<signal pad-id= "pd2" index= "2" function= "IOPORT" group= "PIN" />
<signal pad-id= "pd3" index= "3" function= "IOPORT" group= "PIN" />
<signal pad-id= "pd4" index= "4" function= "IOPORT" group= "PIN" />
<signal pad-id= "pd5" index= "5" function= "IOPORT" group= "PIN" />
<signal pad-id= "pd6" index= "6" function= "IOPORT" group= "PIN" />
<signal pad-id= "pd7" index= "7" function= "IOPORT" group= "PIN" />
</signals>
</peripheral>
<peripheral key= "portf" name= "PORTF" module-key= "gpio_port" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "port" address-space-key= "data" offset= "0x4A0" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pf0" index= "0" function= "IOPORT" group= "PIN" />
<signal pad-id= "pf1" index= "1" function= "IOPORT" group= "PIN" />
<signal pad-id= "pf2" index= "2" function= "IOPORT" group= "PIN" />
<signal pad-id= "pf3" index= "3" function= "IOPORT" group= "PIN" />
<signal pad-id= "pf4" index= "4" function= "IOPORT" group= "PIN" />
<signal pad-id= "pf5" index= "5" function= "IOPORT" group= "PIN" />
<signal pad-id= "pf6" index= "6" function= "IOPORT" group= "PIN" />
<signal pad-id= "pf7" index= "7" function= "IOPORT" group= "PIN" />
</signals>
</peripheral>
<peripheral key= "portmux" name= "PORTMUX" module-key= "avrdd_portmux" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "portmux" address-space-key= "data" offset= "0x5E0" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "rstctrl" name= "RSTCTRL" module-key= "rst_integration_v8" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "rstctrl" address-space-key= "data" offset= "0x40" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pf6" function= "OTHER" group= "RESET" />
</signals>
</peripheral>
<peripheral key= "rtc" name= "RTC" module-key= "tmr_16b_rtc_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "rtc" address-space-key= "data" offset= "0x140" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "sigrow" name= "SIGROW" module-key= "avrdd_sigrow" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "sigrow" address-space-key= "data" offset= "0x1100" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "slpctrl" name= "SLPCTRL" module-key= "clk_sleep_ctrl_avr_v2" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "slpctrl" address-space-key= "data" offset= "0x50" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "spi0" name= "SPI0" module-key= "spi_8bit_v2" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "spi" address-space-key= "data" offset= "0x940" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa5" function= "SPI0" group= "MISO" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pa4" function= "SPI0" group= "MOSI" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pa6" function= "SPI0" group= "SCK" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pa7" function= "SPI0" group= "SS" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pa1" function= "SPI0_ALT3" group= "MISO" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pa0" function= "SPI0_ALT3" group= "MOSI" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pc0" function= "SPI0_ALT3" group= "SCK" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pc1" function= "SPI0_ALT3" group= "SS" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pd5" function= "SPI0_ALT4" group= "MISO" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pd4" function= "SPI0_ALT4" group= "MOSI" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pd6" function= "SPI0_ALT4" group= "SCK" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pd7" function= "SPI0_ALT4" group= "SS" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pc1" function= "SPI0_ALT5" group= "MISO" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pc0" function= "SPI0_ALT5" group= "MOSI" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pc2" function= "SPI0_ALT5" group= "SCK" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pc3" function= "SPI0_ALT5" group= "SS" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pc2" function= "SPI0_ALT6" group= "MISO" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pc1" function= "SPI0_ALT6" group= "MOSI" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pc3" function= "SPI0_ALT6" group= "SCK" field= "PORTMUX.SPIROUTEA.SPI0" />
<signal pad-id= "pf7" function= "SPI0_ALT6" group= "SS" field= "PORTMUX.SPIROUTEA.SPI0" />
</signals>
</peripheral>
<peripheral key= "syscfg" name= "SYSCFG" module-key= "avrdd_syscfg" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "syscfg" address-space-key= "data" offset= "0xF00" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "tca0" name= "TCA0" module-key= "tmr_16b_pwm_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "tca" address-space-key= "data" offset= "0xA00" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa0" index= "0" function= "TCA0" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pa1" index= "1" function= "TCA0" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pa2" index= "2" function= "TCA0" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pa3" index= "3" function= "TCA0" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pa4" index= "4" function= "TCA0" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pa5" index= "5" function= "TCA0" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pc0" index= "0" function= "TCA0_ALT2" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pc1" index= "1" function= "TCA0_ALT2" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pc2" index= "2" function= "TCA0_ALT2" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pc3" index= "3" function= "TCA0_ALT2" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pd1" index= "1" function= "TCA0_ALT3" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pd2" index= "2" function= "TCA0_ALT3" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pd3" index= "3" function= "TCA0_ALT3" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pd4" index= "4" function= "TCA0_ALT3" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pd5" index= "5" function= "TCA0_ALT3" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pf0" index= "0" function= "TCA0_ALT5" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pf1" index= "1" function= "TCA0_ALT5" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pf2" index= "2" function= "TCA0_ALT5" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pf3" index= "3" function= "TCA0_ALT5" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pf4" index= "4" function= "TCA0_ALT5" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
<signal pad-id= "pf5" index= "5" function= "TCA0_ALT5" group= "WO" field= "PORTMUX.TCAROUTEA.TCA0" />
</signals>
</peripheral>
<peripheral key= "tcb0" name= "TCB0" module-key= "tmr_16b_capture_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "tcb" address-space-key= "data" offset= "0xB00" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa2" index= "0" function= "TCB0" group= "WO" field= "PORTMUX.TCBROUTEA.TCB0" />
<signal pad-id= "pf4" index= "0" function= "TCB0_ALT1" group= "WO" field= "PORTMUX.TCBROUTEA.TCB0" />
</signals>
</peripheral>
<peripheral key= "tcb1" name= "TCB1" module-key= "tmr_16b_capture_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "tcb" address-space-key= "data" offset= "0xB10" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa3" index= "0" function= "TCB1" group= "WO" field= "PORTMUX.TCBROUTEA.TCB1" />
<signal pad-id= "pf5" index= "0" function= "TCB1_ALT1" group= "WO" field= "PORTMUX.TCBROUTEA.TCB1" />
</signals>
</peripheral>
<peripheral key= "tcb2" name= "TCB2" module-key= "tmr_16b_capture_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "tcb" address-space-key= "data" offset= "0xB20" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pc0" index= "0" function= "TCB2" group= "WO" field= "PORTMUX.TCBROUTEA.TCB2" />
</signals>
</peripheral>
<peripheral key= "tcd0" name= "TCD0" module-key= "tmr_12b_psc_v1" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "tcd" address-space-key= "data" offset= "0xB80" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa4" function= "TCD0" group= "WOA" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pa5" index= "1" function= "TCD0" group= "WOB" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pa6" index= "2" function= "TCD0" group= "WOC" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pa7" index= "3" function= "TCD0" group= "WOD" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pf0" function= "TCD0_ALT2" group= "WOA" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pf1" index= "1" function= "TCD0_ALT2" group= "WOB" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pf2" index= "2" function= "TCD0_ALT2" group= "WOC" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pf3" index= "3" function= "TCD0_ALT2" group= "WOD" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pa4" function= "TCD0_ALT4" group= "WOA" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pa5" index= "1" function= "TCD0_ALT4" group= "WOB" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pd4" index= "2" function= "TCD0_ALT4" group= "WOC" field= "PORTMUX.TCDROUTEA.TCD0" />
<signal pad-id= "pd5" index= "3" function= "TCD0_ALT4" group= "WOD" field= "PORTMUX.TCDROUTEA.TCD0" />
</signals>
</peripheral>
<peripheral key= "twi0" name= "TWI0" module-key= "i2c_8bit_avr_v3" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "twi" address-space-key= "data" offset= "0x900" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa3" function= "I2C0" group= "SCL" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pc3" function= "I2C0" group= "SCL_DUAL" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pa2" function= "I2C0" group= "SDA" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pc2" function= "I2C0" group= "SDA_DUAL" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pa3" function= "I2C0_ALT1" group= "SCL" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pa2" function= "I2C0_ALT1" group= "SDA" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pc3" function= "I2C0_ALT2" group= "SCL" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pc2" function= "I2C0_ALT2" group= "SDA" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pa1" function= "I2C0_ALT3" group= "SCL" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pc3" function= "I2C0_ALT3" group= "SCL_DUAL" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pa0" function= "I2C0_ALT3" group= "SDA" field= "PORTMUX.TWIROUTEA.TWI0" />
<signal pad-id= "pc2" function= "I2C0_ALT3" group= "SDA_DUAL" field= "PORTMUX.TWIROUTEA.TWI0" />
</signals>
</peripheral>
<peripheral key= "usart0" name= "USART0" module-key= "uart_autobd_v4" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "usart" address-space-key= "data" offset= "0x800" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pa1" function= "USART0" group= "RXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pa0" function= "USART0" group= "TXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pa2" function= "USART0" group= "XCK" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pa3" function= "USART0" group= "XDIR" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pa5" function= "USART0_ALT1" group= "RXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pa4" function= "USART0_ALT1" group= "TXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pa6" function= "USART0_ALT1" group= "XCK" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pa7" function= "USART0_ALT1" group= "XDIR" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pa3" function= "USART0_ALT2" group= "RXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pa2" function= "USART0_ALT2" group= "TXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pd5" function= "USART0_ALT3" group= "RXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pd4" function= "USART0_ALT3" group= "TXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pd6" function= "USART0_ALT3" group= "XCK" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pd7" function= "USART0_ALT3" group= "XDIR" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pc2" function= "USART0_ALT4" group= "RXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pc1" function= "USART0_ALT4" group= "TXD" field= "PORTMUX.USARTROUTEA.USART0" />
<signal pad-id= "pc3" function= "USART0_ALT4" group= "XCK" field= "PORTMUX.USARTROUTEA.USART0" />
</signals>
</peripheral>
<peripheral key= "usart1" name= "USART1" module-key= "uart_autobd_v4" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "usart" address-space-key= "data" offset= "0x820" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pc1" function= "USART1" group= "RXD" field= "PORTMUX.USARTROUTEA.USART1" />
<signal pad-id= "pc0" function= "USART1" group= "TXD" field= "PORTMUX.USARTROUTEA.USART1" />
<signal pad-id= "pc2" function= "USART1" group= "XCK" field= "PORTMUX.USARTROUTEA.USART1" />
<signal pad-id= "pc3" function= "USART1" group= "XDIR" field= "PORTMUX.USARTROUTEA.USART1" />
<signal pad-id= "pd7" function= "USART1_ALT2" group= "RXD" field= "PORTMUX.USARTROUTEA.USART1" />
<signal pad-id= "pd6" function= "USART1_ALT2" group= "TXD" field= "PORTMUX.USARTROUTEA.USART1" />
</signals>
</peripheral>
<peripheral key= "userrow" name= "USERROW" module-key= "avrdd_userrow" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "userrow" address-space-key= "data" offset= "0x1080" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "vporta" name= "VPORTA" module-key= "gpio_ports_avr_v2_vport" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "vport" address-space-key= "data" offset= "0x0" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "vportc" name= "VPORTC" module-key= "gpio_ports_avr_v2_vport" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "vport" address-space-key= "data" offset= "0x8" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "vportd" name= "VPORTD" module-key= "gpio_ports_avr_v2_vport" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "vport" address-space-key= "data" offset= "0xC" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "vportf" name= "VPORTF" module-key= "gpio_ports_avr_v2_vport" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "vport" address-space-key= "data" offset= "0x14" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "vref" name= "VREF" module-key= "avrdd_vref" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "vref" address-space-key= "data" offset= "0xB0" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "wdt" name= "WDT" module-key= "wdt_windowed_v2" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "wdt" address-space-key= "data" offset= "0x100" />
2024-02-09 00:03:15 +00:00
</peripheral>
<peripheral key= "zcd3" name= "ZCD3" module-key= "cmp_zxover_ctrl_v3" >
2024-08-13 19:54:05 +01:00
<register-group-instance register-group-key= "zcd" address-space-key= "data" offset= "0x6D8" />
2024-02-09 00:03:15 +00:00
<signals >
<signal pad-id= "pc2" function= "ZCD3" group= "IN" field= "PORTMUX.ZCDROUTEA.ZCD3" />
<signal pad-id= "pa7" function= "ZCD3" group= "OUT" field= "PORTMUX.ZCDROUTEA.ZCD3" />
</signals>
</peripheral>
</peripherals>
2023-12-13 20:33:41 +00:00
<modules >
2024-02-09 00:03:15 +00:00
<module key= "cmp_control_v8" name= "AC" description= "Analog Comparator" >
<register-group key= "ac" name= "AC" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "hysmode" name= "HYSMODE" description= "Hysteresis Mode" mask= "0x06" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "power" name= "POWER" description= "Power profile" mask= "0x18" access= "RW" />
<bit-field key= "outen" name= "OUTEN" description= "Output Pad Enable" mask= "0x40" access= "RW" />
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run in Standby Mode" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "muxctrl" name= "MUXCTRL" description= "Mux Control A" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "muxneg" name= "MUXNEG" description= "Negative Input MUX Selection" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "muxpos" name= "MUXPOS" description= "Positive Input MUX Selection" mask= "0x38" access= "RW" />
<bit-field key= "initval" name= "INITVAL" description= "AC Output Initial Value" mask= "0x40" access= "RW" />
<bit-field key= "invert" name= "INVERT" description= "Invert AC Output" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "dacref" name= "DACREF" description= "DAC Voltage Reference" offset= "0x05" size= "1" initial-value= "0xFF" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "dacref" name= "DACREF" description= "DACREF" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Interrupt Control" offset= "0x06" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cmp" name= "CMP" description= "Interrupt Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "intmode" name= "INTMODE" description= "Interrupt Mode" mask= "0x30" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x07" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cmpif" name= "CMPIF" description= "Analog Comparator Interrupt Flag" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cmpstate" name= "CMPSTATE" description= "Analog Comparator State" mask= "0x10" access= "R" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "adc_12b_diff_ctrl_v1" name= "ADC" description= "Analog to Digital Converter" >
<register-group key= "adc" name= "ADC" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "ADC Enable" mask= "0x01" access= "RW" />
<bit-field key= "freerun" name= "FREERUN" description= "Free running mode" mask= "0x02" access= "RW" />
<bit-field key= "ressel" name= "RESSEL" description= "Resolution selection" mask= "0x0C" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "leftadj" name= "LEFTADJ" description= "Left adjust result" mask= "0x10" access= "RW" />
<bit-field key= "convmode" name= "CONVMODE" description= "Conversion mode" mask= "0x20" access= "RW" />
<bit-field key= "runstby" name= "RUNSTBY" description= "Run standby mode" mask= "0x80" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb" name= "CTRLB" description= "Control B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "sampnum" name= "SAMPNUM" description= "Accumulation Samples" mask= "0x07" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlc" name= "CTRLC" description= "Control C" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "presc" name= "PRESC" description= "Clock Pre-scaler" mask= "0x0F" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrld" name= "CTRLD" description= "Control D" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "sampdly" name= "SAMPDLY" description= "Sampling Delay Selection" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "initdly" name= "INITDLY" description= "Initial Delay Selection" mask= "0xE0" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrle" name= "CTRLE" description= "Control E" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "wincm" name= "WINCM" description= "Window Comparator Mode" mask= "0x07" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "sampctrl" name= "SAMPCTRL" description= "Sample Control" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "samplen" name= "SAMPLEN" description= "Sample lenght" mask= "0xFF" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "muxpos" name= "MUXPOS" description= "Positive mux input" offset= "0x08" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "muxpos" name= "MUXPOS" description= "Analog Channel Selection Bits" mask= "0x7F" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "muxneg" name= "MUXNEG" description= "Negative mux input" offset= "0x09" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "muxneg" name= "MUXNEG" description= "Analog Channel Selection Bits" mask= "0x7F" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "command" name= "COMMAND" description= "Command" offset= "0x0A" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "stconv" name= "STCONV" description= "Start Conversion" mask= "0x01" access= "RW" />
<bit-field key= "spconv" name= "SPCONV" description= "Stop Conversion" mask= "0x02" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "evctrl" name= "EVCTRL" description= "Event Control" offset= "0x0B" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "startei" name= "STARTEI" description= "Start Event Input Enable" mask= "0x01" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Interrupt Control" offset= "0x0C" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "resrdy" name= "RESRDY" description= "Result Ready Interrupt Enable" mask= "0x01" access= "RW" />
<bit-field key= "wcmp" name= "WCMP" description= "Window Comparator Interrupt Enable" mask= "0x02" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x0D" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "resrdy" name= "RESRDY" description= "Result Ready Flag" mask= "0x01" access= "RW" />
<bit-field key= "wcmp" name= "WCMP" description= "Window Comparator Flag" mask= "0x02" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "dbgctrl" name= "DBGCTRL" description= "Debug Control" offset= "0x0E" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dbgrun" name= "DBGRUN" description= "Debug run" mask= "0x01" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "temp" name= "TEMP" description= "Temporary Data" offset= "0x0F" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "temp" name= "TEMP" description= "Temporary" mask= "0xFF" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
2024-03-14 23:59:15 +00:00
<register key= "res" name= "RES" description= "ADC Accumulator Result" offset= "0x10" size= "2" access= "R" />
<register key= "winlt" name= "WINLT" description= "Window comparator low threshold" offset= "0x12" size= "2" access= "RW" />
<register key= "winht" name= "WINHT" description= "Window comparator high threshold" offset= "0x14" size= "2" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "bor_lvd_ctrl_v1" name= "BOD" description= "Bod interface" >
<register-group key= "bod" name= "BOD" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x01" access= "RW" >
<bit-field key= "sleep" name= "SLEEP" description= "Operation in sleep mode" mask= "0x03" access= "RW" />
<bit-field key= "active" name= "ACTIVE" description= "Operation in active mode" mask= "0x0C" access= "R" />
2024-03-14 23:59:15 +00:00
<bit-field key= "sampfreq" name= "SAMPFREQ" description= "Sample frequency" mask= "0x10" access= "R" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb" name= "CTRLB" description= "Control B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "lvl" name= "LVL" description= "Bod level" mask= "0x07" access= "R" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "vlmctrla" name= "VLMCTRLA" description= "Voltage level monitor Control" offset= "0x08" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "vlmlvl" name= "VLMLVL" description= "voltage level monitor level" mask= "0x03" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Voltage level monitor interrupt Control" offset= "0x09" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "vlmie" name= "VLMIE" description= "voltage level monitor interrrupt enable" mask= "0x01" access= "RW" />
<bit-field key= "vlmcfg" name= "VLMCFG" description= "Configuration" mask= "0x06" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags" name= "INTFLAGS" description= "Voltage level monitor interrupt Flags" offset= "0x0A" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "vlmif" name= "VLMIF" description= "Voltage level monitor interrupt flag" mask= "0x01" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Voltage level monitor status" offset= "0x0B" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "vlms" name= "VLMS" description= "Voltage level monitor status" mask= "0x01" access= "R" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "cla_ccl_v1" name= "CCL" description= "Configurable Custom Logic" >
<register-group key= "ccl" name= "CCL" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control Register A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run in Standby" mask= "0x40" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "seqctrl0" name= "SEQCTRL0" description= "Sequential Control 0" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "seqsel" name= "SEQSEL" description= "Sequential Selection" mask= "0x07" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "seqctrl1" name= "SEQCTRL1" description= "Sequential Control 1" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "seqsel" name= "SEQSEL" description= "Sequential Selection" mask= "0x07" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl0" name= "INTCTRL0" description= "Interrupt Control 0" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "intmode0" name= "INTMODE0" description= "Interrupt Mode for LUT0" mask= "0x03" access= "RW" />
<bit-field key= "intmode1" name= "INTMODE1" description= "Interrupt Mode for LUT1" mask= "0x0C" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "intmode2" name= "INTMODE2" description= "Interrupt Mode for LUT2" mask= "0x30" access= "RW" />
<bit-field key= "intmode3" name= "INTMODE3" description= "Interrupt Mode for LUT3" mask= "0xC0" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x07" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "int" name= "INT" description= "Interrupt Flag" mask= "0x0F" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut0ctrla" name= "LUT0CTRLA" description= "LUT 0 Control A" offset= "0x08" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "LUT Enable" mask= "0x01" access= "RW" />
<bit-field key= "clksrc" name= "CLKSRC" description= "Clock Source Selection" mask= "0x0E" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "filtsel" name= "FILTSEL" description= "Filter Selection" mask= "0x30" access= "RW" />
<bit-field key= "outen" name= "OUTEN" description= "Output Enable" mask= "0x40" access= "RW" />
<bit-field key= "edgedet" name= "EDGEDET" description= "Edge Detection Enable" mask= "0x80" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut0ctrlb" name= "LUT0CTRLB" description= "LUT 0 Control B" offset= "0x09" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "insel0" name= "INSEL0" description= "LUT Input 0 Source Selection" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "insel1" name= "INSEL1" description= "LUT Input 1 Source Selection" mask= "0xF0" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut0ctrlc" name= "LUT0CTRLC" description= "LUT 0 Control C" offset= "0x0A" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "insel2" name= "INSEL2" description= "LUT Input 2 Source Selection" mask= "0x0F" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "truth0" name= "TRUTH0" description= "Truth 0" offset= "0x0B" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "truth" name= "TRUTH" description= "Truth Table" mask= "0xFF" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut1ctrla" name= "LUT1CTRLA" description= "LUT 1 Control A" offset= "0x0C" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "LUT Enable" mask= "0x01" access= "RW" />
<bit-field key= "clksrc" name= "CLKSRC" description= "Clock Source Selection" mask= "0x0E" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "filtsel" name= "FILTSEL" description= "Filter Selection" mask= "0x30" access= "RW" />
<bit-field key= "outen" name= "OUTEN" description= "Output Enable" mask= "0x40" access= "RW" />
<bit-field key= "edgedet" name= "EDGEDET" description= "Edge Detection Enable" mask= "0x80" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut1ctrlb" name= "LUT1CTRLB" description= "LUT 1 Control B" offset= "0x0D" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "insel0" name= "INSEL0" description= "LUT Input 0 Source Selection" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "insel1" name= "INSEL1" description= "LUT Input 1 Source Selection" mask= "0xF0" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut1ctrlc" name= "LUT1CTRLC" description= "LUT 1 Control C" offset= "0x0E" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "insel2" name= "INSEL2" description= "LUT Input 2 Source Selection" mask= "0x0F" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "truth1" name= "TRUTH1" description= "Truth 1" offset= "0x0F" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "truth" name= "TRUTH" description= "Truth Table" mask= "0xFF" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut2ctrla" name= "LUT2CTRLA" description= "LUT 2 Control A" offset= "0x10" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "LUT Enable" mask= "0x01" access= "RW" />
<bit-field key= "clksrc" name= "CLKSRC" description= "Clock Source Selection" mask= "0x0E" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "filtsel" name= "FILTSEL" description= "Filter Selection" mask= "0x30" access= "RW" />
<bit-field key= "outen" name= "OUTEN" description= "Output Enable" mask= "0x40" access= "RW" />
<bit-field key= "edgedet" name= "EDGEDET" description= "Edge Detection Enable" mask= "0x80" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut2ctrlb" name= "LUT2CTRLB" description= "LUT 2 Control B" offset= "0x11" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "insel0" name= "INSEL0" description= "LUT Input 0 Source Selection" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "insel1" name= "INSEL1" description= "LUT Input 1 Source Selection" mask= "0xF0" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut2ctrlc" name= "LUT2CTRLC" description= "LUT 2 Control C" offset= "0x12" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "insel2" name= "INSEL2" description= "LUT Input 2 Source Selection" mask= "0x0F" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "truth2" name= "TRUTH2" description= "Truth 2" offset= "0x13" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "truth" name= "TRUTH" description= "Truth Table" mask= "0xFF" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut3ctrla" name= "LUT3CTRLA" description= "LUT 3 Control A" offset= "0x14" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "LUT Enable" mask= "0x01" access= "RW" />
<bit-field key= "clksrc" name= "CLKSRC" description= "Clock Source Selection" mask= "0x0E" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "filtsel" name= "FILTSEL" description= "Filter Selection" mask= "0x30" access= "RW" />
<bit-field key= "outen" name= "OUTEN" description= "Output Enable" mask= "0x40" access= "RW" />
<bit-field key= "edgedet" name= "EDGEDET" description= "Edge Detection Enable" mask= "0x80" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut3ctrlb" name= "LUT3CTRLB" description= "LUT 3 Control B" offset= "0x15" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "insel0" name= "INSEL0" description= "LUT Input 0 Source Selection" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "insel1" name= "INSEL1" description= "LUT Input 1 Source Selection" mask= "0xF0" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lut3ctrlc" name= "LUT3CTRLC" description= "LUT 3 Control C" offset= "0x16" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "insel2" name= "INSEL2" description= "LUT Input 2 Source Selection" mask= "0x0F" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "truth3" name= "TRUTH3" description= "Truth 3" offset= "0x17" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "truth" name= "TRUTH" description= "Truth Table" mask= "0xFF" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_clkctrl" name= "CLKCTRL" description= "Clock controller" >
<register-group key= "clkctrl" name= "CLKCTRL" >
2024-08-01 19:27:16 +01:00
<register key= "mclkctrla" name= "MCLKCTRLA" description= "MCLK Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "clksel" name= "CLKSEL" description= "Clock select" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "clkout" name= "CLKOUT" description= "System clock out" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "mclkctrlb" name= "MCLKCTRLB" description= "MCLK Control B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "pen" name= "PEN" description= "Prescaler enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "pdiv" name= "PDIV" description= "Prescaler division" mask= "0x1E" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "mclkctrlc" name= "MCLKCTRLC" description= "MCLK Control C" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cfden" name= "CFDEN" description= "Clock Failure Detect Enable" mask= "0x01" access= "RW" />
<bit-field key= "cfdtst" name= "CFDTST" description= "Clock Failure Detect Test" mask= "0x02" access= "W" />
<bit-field key= "cfdsrc" name= "CFDSRC" description= "Clock Failure Detect Source" mask= "0x0C" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "mclkintctrl" name= "MCLKINTCTRL" description= "MCLK Interrupt Control" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cfd" name= "CFD" description= "Clock Failure Detect Interrupt Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "inttype" name= "INTTYPE" description= "Interrupt type" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "mclkintflags" name= "MCLKINTFLAGS" description= "MCLK Interrupt Flags" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cfd" name= "CFD" description= "Clock Failure Detect Interrupt Flag" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "mclkstatus" name= "MCLKSTATUS" description= "MCLK Status" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "sosc" name= "SOSC" description= "System Oscillator changing" mask= "0x01" access= "RW" />
<bit-field key= "oschfs" name= "OSCHFS" description= "High frequency oscillator status" mask= "0x02" access= "RW" />
<bit-field key= "osc32ks" name= "OSC32KS" description= "32KHz oscillator status" mask= "0x04" access= "RW" />
<bit-field key= "xosc32ks" name= "XOSC32KS" description= "32.768 kHz Crystal Oscillator status" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "exts" name= "EXTS" description= "External Clock status" mask= "0x10" access= "RW" />
<bit-field key= "plls" name= "PLLS" description= "PLL oscillator status" mask= "0x20" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "oschfctrla" name= "OSCHFCTRLA" description= "OSCHF Control A" offset= "0x08" size= "1" initial-value= "0x0C" access= "RW" >
<bit-field key= "autotune" name= "AUTOTUNE" description= "Autotune" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "frqsel" name= "FRQSEL" description= "Frequency select" mask= "0x3C" access= "RW" />
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run standby" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "oschftune" name= "OSCHFTUNE" description= "OSCHF Tune" offset= "0x09" size= "1" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "tune" name= "TUNE" description= "Tune" mask= "0xFF" access= "RW" />
</register>
<register key= "pllctrla" name= "PLLCTRLA" description= "PLL Control A" offset= "0x10" size= "1" access= "RW" >
2024-08-01 19:27:16 +01:00
<bit-field key= "mulfac" name= "MULFAC" description= "Multiplication factor" mask= "0x03" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "source" name= "SOURCE" description= "Source" mask= "0x40" access= "RW" />
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run standby" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "osc32kctrla" name= "OSC32KCTRLA" description= "OSC32K Control A" offset= "0x18" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run standby" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "xosc32kctrla" name= "XOSC32KCTRLA" description= "XOSC32K Control A" offset= "0x1C" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "lpmode" name= "LPMODE" description= "Low power mode" mask= "0x02" access= "RW" />
<bit-field key= "sel" name= "SEL" description= "Select" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "csut" name= "CSUT" description= "Crystal startup time" mask= "0x30" access= "RW" />
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run standby" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "xoschfctrla" name= "XOSCHFCTRLA" description= "XOSC HF Control A" offset= "0x20" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "selhf" name= "SELHF" description= "External Source Select" mask= "0x02" access= "RW" />
<bit-field key= "frqrange" name= "FRQRANGE" description= "Frequency Range" mask= "0x0C" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "csuthf" name= "CSUTHF" description= "Start-up Time Select" mask= "0x30" access= "RW" />
<bit-field key= "runstby" name= "RUNSTBY" description= "Run Standby" mask= "0x80" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "cpu_avr_xt_v1" name= "CPU" description= "CPU" >
<register-group key= "cpu" name= "CPU" >
2024-08-01 19:27:16 +01:00
<register key= "ccp" name= "CCP" description= "Configuration Change Protection" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "ccp" name= "CCP" description= "CCP signature" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "sp" name= "SP" description= "Stack Pointer" offset= "0x0D" size= "2" initial-value= "0x7FFF" access= "RW" />
<register key= "sreg" name= "SREG" description= "Status Register" offset= "0x0F" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "c" name= "C" description= "Carry Flag" mask= "0x01" access= "RW" />
<bit-field key= "z" name= "Z" description= "Zero Flag" mask= "0x02" access= "RW" />
<bit-field key= "n" name= "N" description= "Negative Flag" mask= "0x04" access= "RW" />
<bit-field key= "v" name= "V" description= "Two's Complement Overflow Flag" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "s" name= "S" description= "N Exclusive Or V Flag" mask= "0x10" access= "RW" />
<bit-field key= "h" name= "H" description= "Half Carry Flag" mask= "0x20" access= "RW" />
<bit-field key= "t" name= "T" description= "Transfer Bit" mask= "0x40" access= "RW" />
<bit-field key= "i" name= "I" description= "Global Interrupt Enable Flag" mask= "0x80" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "int_8bit_v3" name= "CPUINT" description= "Interrupt Controller" >
<register-group key= "cpuint" name= "CPUINT" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "lvl0rr" name= "LVL0RR" description= "Round-robin Scheduling Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cvt" name= "CVT" description= "Compact Vector Table" mask= "0x20" access= "RW" />
<bit-field key= "ivsel" name= "IVSEL" description= "Interrupt Vector Select" mask= "0x40" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "lvl0ex" name= "LVL0EX" description= "Level 0 Interrupt Executing" mask= "0x01" access= "R" />
<bit-field key= "lvl1ex" name= "LVL1EX" description= "Level 1 Interrupt Executing" mask= "0x02" access= "R" />
2024-03-14 23:59:15 +00:00
<bit-field key= "nmiex" name= "NMIEX" description= "Non-maskable Interrupt Executing" mask= "0x80" access= "R" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lvl0pri" name= "LVL0PRI" description= "Interrupt Level 0 Priority" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "lvl0pri" name= "LVL0PRI" description= "Interrupt Level Priority" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "lvl1vec" name= "LVL1VEC" description= "Interrupt Level 1 Priority Vector" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "lvl1vec" name= "LVL1VEC" description= "Interrupt Vector with High Priority" mask= "0xFF" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "math_pdi_crc_v1" name= "CRCSCAN" description= "CRCSCAN" >
<register-group key= "crcscan" name= "CRCSCAN" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable CRC scan" mask= "0x01" access= "RW" />
<bit-field key= "nmien" name= "NMIEN" description= "Enable NMI Trigger" mask= "0x02" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "reset" name= "RESET" description= "Reset CRC scan" mask= "0x80" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb" name= "CTRLB" description= "Control B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "src" name= "SRC" description= "CRC Source" mask= "0x03" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x02" size= "1" initial-value= "0x02" access= "R" >
<bit-field key= "busy" name= "BUSY" description= "CRC Busy" mask= "0x01" access= "R" />
<bit-field key= "ok" name= "OK" description= "CRC Ok" mask= "0x02" access= "R" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "dac_nbit_ctrl_v5" name= "DAC" description= "Digital to Analog Converter" >
<register-group key= "dac" name= "DAC" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control Register A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "DAC Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "outen" name= "OUTEN" description= "Output Buffer Enable" mask= "0x40" access= "RW" />
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run in Standby Mode" mask= "0x80" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "data" name= "DATA" description= "DATA Register" offset= "0x02" size= "2" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "data" name= "DATA" description= "Data" mask= "0xFFC0" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_evsys" name= "EVSYS" description= "Event System" >
<register-group key= "evsys" name= "EVSYS" >
2024-08-01 19:27:16 +01:00
<register key= "sweventa" name= "SWEVENTA" description= "Software Event A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "sweventa" name= "SWEVENTA" description= "Software event on channel select" mask= "0xFF" access= "W" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "sweventb" name= "SWEVENTB" description= "Software Event B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "sweventb" name= "SWEVENTB" description= "Software event on channel select" mask= "0x03" access= "W" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "channel0" name= "CHANNEL0" description= "Multiplexer Channel 0" offset= "0x10" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "channel0" name= "CHANNEL0" description= "Channel 0 generator select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "channel1" name= "CHANNEL1" description= "Multiplexer Channel 1" offset= "0x11" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "channel1" name= "CHANNEL1" description= "Channel 1 generator select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "channel2" name= "CHANNEL2" description= "Multiplexer Channel 2" offset= "0x12" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "channel2" name= "CHANNEL2" description= "Channel 2 generator select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "channel3" name= "CHANNEL3" description= "Multiplexer Channel 3" offset= "0x13" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "channel3" name= "CHANNEL3" description= "Channel 3 generator select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "channel4" name= "CHANNEL4" description= "Multiplexer Channel 4" offset= "0x14" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "channel4" name= "CHANNEL4" description= "Channel 4 generator select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "channel5" name= "CHANNEL5" description= "Multiplexer Channel 5" offset= "0x15" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "channel5" name= "CHANNEL5" description= "Channel 5 generator select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userccllut0a" name= "USERCCLLUT0A" description= "User 0 - CCL0 Event A" offset= "0x20" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userccllut0b" name= "USERCCLLUT0B" description= "User 1 - CCL0 Event B" offset= "0x21" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userccllut1a" name= "USERCCLLUT1A" description= "User 2 - CCL1 Event A" offset= "0x22" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userccllut1b" name= "USERCCLLUT1B" description= "User 3 - CCL1 Event B" offset= "0x23" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userccllut2a" name= "USERCCLLUT2A" description= "User 4 - CCL2 Event A" offset= "0x24" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userccllut2b" name= "USERCCLLUT2B" description= "User 5 - CCL2 Event B" offset= "0x25" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userccllut3a" name= "USERCCLLUT3A" description= "User 6 - CCL3 Event A" offset= "0x26" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userccllut3b" name= "USERCCLLUT3B" description= "User 7 - CCL3 Event B" offset= "0x27" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "useradc0start" name= "USERADC0START" description= "User 12 - ADC0" offset= "0x28" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userevsysevouta" name= "USEREVSYSEVOUTA" description= "User 13 - EVOUTA" offset= "0x29" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userevsysevoutc" name= "USEREVSYSEVOUTC" description= "User 15 - EVOUTC" offset= "0x2A" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userevsysevoutd" name= "USEREVSYSEVOUTD" description= "User 16 - EVOUTD" offset= "0x2B" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userevsysevoutf" name= "USEREVSYSEVOUTF" description= "User 18 - EVOUTF" offset= "0x2C" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userusart0irda" name= "USERUSART0IRDA" description= "User 20 - USART0" offset= "0x2D" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "userusart1irda" name= "USERUSART1IRDA" description= "User 21 - USART1" offset= "0x2E" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertca0cnta" name= "USERTCA0CNTA" description= "User 26 - TCA0 Event A" offset= "0x2F" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertca0cntb" name= "USERTCA0CNTB" description= "User 27 - TCA0 Event B" offset= "0x30" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertcb0capt" name= "USERTCB0CAPT" description= "User 30 - TCB0 Event A" offset= "0x31" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertcb0count" name= "USERTCB0COUNT" description= "User 31 - TCB0 Event B" offset= "0x32" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertcb1capt" name= "USERTCB1CAPT" description= "User 32 - TCB1 Event A" offset= "0x33" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertcb1count" name= "USERTCB1COUNT" description= "User 33 - TCB1 Event B" offset= "0x34" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertcb2capt" name= "USERTCB2CAPT" description= "User 34 - TCB2 Event A" offset= "0x35" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertcb2count" name= "USERTCB2COUNT" description= "User 35 - TCB2 Event B" offset= "0x36" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertcd0inputa" name= "USERTCD0INPUTA" description= "User 40 - TCD0 Event A" offset= "0x37" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usertcd0inputb" name= "USERTCD0INPUTB" description= "User 41 - TCD0 Event B" offset= "0x38" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "user" name= "USER" description= "User channel select" mask= "0xFF" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_fuse" name= "FUSE" description= "Fuses" >
<register-group key= "fuse" name= "FUSE" >
2024-08-01 19:27:16 +01:00
<register key= "wdtcfg" name= "WDTCFG" description= "Watchdog Configuration" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "period" name= "PERIOD" description= "Watchdog Timeout Period" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "window" name= "WINDOW" description= "Watchdog Window Timeout Period" mask= "0xF0" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "bodcfg" name= "BODCFG" description= "BOD Configuration" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "sleep" name= "SLEEP" description= "BOD Operation in Sleep Mode" mask= "0x03" access= "RW" />
<bit-field key= "active" name= "ACTIVE" description= "BOD Operation in Active Mode" mask= "0x0C" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "sampfreq" name= "SAMPFREQ" description= "BOD Sample Frequency" mask= "0x10" access= "RW" />
<bit-field key= "lvl" name= "LVL" description= "BOD Level" mask= "0xE0" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "osccfg" name= "OSCCFG" description= "Oscillator Configuration" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "clksel" name= "CLKSEL" description= "Frequency Select" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "syscfg0" name= "SYSCFG0" description= "System Configuration 0" offset= "0x05" size= "1" initial-value= "0xD0" access= "RW" >
<bit-field key= "eesave" name= "EESAVE" description= "EEPROM Save" mask= "0x01" access= "RW" />
<bit-field key= "rstpincfg" name= "RSTPINCFG" description= "Reset Pin Configuration" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "updipincfg" name= "UPDIPINCFG" description= "UPDI Pin Configuration" mask= "0x10" access= "RW" />
<bit-field key= "crcsel" name= "CRCSEL" description= "CRC Select" mask= "0x20" access= "RW" />
<bit-field key= "crcsrc" name= "CRCSRC" description= "CRC Source" mask= "0xC0" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "syscfg1" name= "SYSCFG1" description= "System Configuration 1" offset= "0x06" size= "1" initial-value= "0x08" access= "RW" >
<bit-field key= "sut" name= "SUT" description= "Startup Time" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "mvsyscfg" name= "MVSYSCFG" description= "MVIO System Configuration" mask= "0x18" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "codesize" name= "CODESIZE" description= "Code Section Size" offset= "0x07" size= "1" initial-value= "0x00" access= "RW" />
<register key= "bootsize" name= "BOOTSIZE" description= "Boot Section Size" offset= "0x08" size= "1" initial-value= "0x00" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_gpr" name= "GPR" description= "General Purpose Registers" >
<register-group key= "gpr" name= "GPR" >
2024-08-01 19:27:16 +01:00
<register key= "gpr0" name= "GPR0" description= "General Purpose Register 0" offset= "0x00" size= "1" access= "RW" />
<register key= "gpr1" name= "GPR1" description= "General Purpose Register 1" offset= "0x01" size= "1" access= "RW" />
<register key= "gpr2" name= "GPR2" description= "General Purpose Register 2" offset= "0x02" size= "1" access= "RW" />
<register key= "gpr3" name= "GPR3" description= "General Purpose Register 3" offset= "0x03" size= "1" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_lock" name= "LOCK" description= "Lockbits" >
<register-group key= "lock" name= "LOCK" >
2024-08-01 19:27:16 +01:00
<register key= "key" name= "KEY" description= "Lock Key Bits" offset= "0x00" size= "4" initial-value= "0x5CC5C55C" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "key" name= "KEY" description= "Lock Key" mask= "0xFFFFFFFF" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "io_multiv_ctrl_avr_v1" name= "MVIO" description= "Multi-Voltage I/O" >
<register-group key= "mvio" name= "MVIO" >
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Interrupt Control" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "vddio2ie" name= "VDDIO2IE" description= "VDDIO2 Interrupt Enable" mask= "0x01" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "vddio2if" name= "VDDIO2IF" description= "VDDIO2 Interrupt Flag" mask= "0x01" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x02" size= "1" initial-value= "0x00" access= "R" >
<bit-field key= "vddio2s" name= "VDDIO2S" description= "VDDIO2 Status" mask= "0x01" access= "R" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "nvm_ctrl_avr_v1" name= "NVMCTRL" description= "Non-volatile Memory Controller" >
<register-group key= "nvmctrl" name= "NVMCTRL" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "cmd" name= "CMD" description= "Command" mask= "0x7F" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb" name= "CTRLB" description= "Control B" offset= "0x01" size= "1" initial-value= "0x30" access= "RW" >
<bit-field key= "appcodewp" name= "APPCODEWP" description= "Application Code Write Protect" mask= "0x01" access= "RW" />
<bit-field key= "bootrp" name= "BOOTRP" description= "Boot Read Protect" mask= "0x02" access= "RW" />
<bit-field key= "appdatawp" name= "APPDATAWP" description= "Application Data Write Protect" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "flmap" name= "FLMAP" description= "Flash Mapping in Data space" mask= "0x30" access= "RW" />
<bit-field key= "flmaplock" name= "FLMAPLOCK" description= "Flash Mapping Lock" mask= "0x80" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x02" size= "1" initial-value= "0x00" access= "R" >
<bit-field key= "fbusy" name= "FBUSY" description= "Flash busy" mask= "0x01" access= "R" />
<bit-field key= "eebusy" name= "EEBUSY" description= "EEPROM busy" mask= "0x02" access= "R" />
2024-03-14 23:59:15 +00:00
<bit-field key= "error" name= "ERROR" description= "Write error" mask= "0x70" access= "R" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Interrupt Control" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "eeready" name= "EEREADY" description= "EEPROM Ready" mask= "0x01" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "eeready" name= "EEREADY" description= "EEPROM Ready" mask= "0x01" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "data" name= "DATA" description= "Data" offset= "0x06" size= "2" access= "RW" />
<register key= "addr" name= "ADDR" description= "Address" offset= "0x08" size= "4" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "gpio_port" name= "PORT" description= "I/O Ports" >
<register-group key= "port" name= "PORT" >
2024-08-01 19:27:16 +01:00
<register key= "dir" name= "DIR" description= "Data Direction" offset= "0x00" size= "1" access= "RW" />
<register key= "dirset" name= "DIRSET" description= "Data Direction Set" offset= "0x01" size= "1" access= "RW" />
<register key= "dirclr" name= "DIRCLR" description= "Data Direction Clear" offset= "0x02" size= "1" access= "RW" />
<register key= "dirtgl" name= "DIRTGL" description= "Data Direction Toggle" offset= "0x03" size= "1" access= "RW" />
<register key= "out" name= "OUT" description= "Output Value" offset= "0x04" size= "1" access= "RW" />
<register key= "outset" name= "OUTSET" description= "Output Value Set" offset= "0x05" size= "1" access= "RW" />
<register key= "outclr" name= "OUTCLR" description= "Output Value Clear" offset= "0x06" size= "1" access= "RW" />
<register key= "outtgl" name= "OUTTGL" description= "Output Value Toggle" offset= "0x07" size= "1" access= "RW" />
<register key= "in" name= "IN" description= "Input Value" offset= "0x08" size= "1" access= "RW" />
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x09" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "int" name= "INT" description= "Pin Interrupt Flag" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "portctrl" name= "PORTCTRL" description= "Port Control" offset= "0x0A" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pinconfig" name= "PINCONFIG" description= "Pin Control Config" offset= "0x0B" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pinctrlupd" name= "PINCTRLUPD" description= "Pin Control Update" offset= "0x0C" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pinctrlset" name= "PINCTRLSET" description= "Pin Control Set" offset= "0x0D" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pinctrlclr" name= "PINCTRLCLR" description= "Pin Control Clear" offset= "0x0E" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pin0ctrl" name= "PIN0CTRL" description= "Pin 0 Control" offset= "0x10" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pin1ctrl" name= "PIN1CTRL" description= "Pin 1 Control" offset= "0x11" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pin2ctrl" name= "PIN2CTRL" description= "Pin 2 Control" offset= "0x12" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pin3ctrl" name= "PIN3CTRL" description= "Pin 3 Control" offset= "0x13" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pin4ctrl" name= "PIN4CTRL" description= "Pin 4 Control" offset= "0x14" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pin5ctrl" name= "PIN5CTRL" description= "Pin 5 Control" offset= "0x15" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pin6ctrl" name= "PIN6CTRL" description= "Pin 6 Control" offset= "0x16" size= "1" initial-value= "0x00" access= "RW" />
<register key= "pin7ctrl" name= "PIN7CTRL" description= "Pin 7 Control" offset= "0x17" size= "1" initial-value= "0x00" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_portmux" name= "PORTMUX" description= "Port Multiplexer" >
<register-group key= "portmux" name= "PORTMUX" >
2024-08-01 19:27:16 +01:00
<register key= "evsysroutea" name= "EVSYSROUTEA" description= "EVSYS route A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "evouta" name= "EVOUTA" description= "Event Output A" mask= "0x01" access= "RW" />
<bit-field key= "evoutc" name= "EVOUTC" description= "Event Output C" mask= "0x04" access= "RW" />
<bit-field key= "evoutd" name= "EVOUTD" description= "Event Output D" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "evoutf" name= "EVOUTF" description= "Event Output F" mask= "0x20" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "cclroutea" name= "CCLROUTEA" description= "CCL route A" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "lut0" name= "LUT0" description= "CCL Look-Up Table 0 Signals" mask= "0x01" access= "RW" />
<bit-field key= "lut1" name= "LUT1" description= "CCL Look-Up Table 1 Signals" mask= "0x02" access= "RW" />
<bit-field key= "lut2" name= "LUT2" description= "CCL Look-Up Table 2 Signals" mask= "0x04" access= "RW" />
<bit-field key= "lut3" name= "LUT3" description= "CCL Look-Up Table 3 Signals" mask= "0x08" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "usartroutea" name= "USARTROUTEA" description= "USART route A" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "usart0" name= "USART0" description= "USART0 Signals" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "usart1" name= "USART1" description= "USART1 Signals" mask= "0x18" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "spiroutea" name= "SPIROUTEA" description= "SPI route A" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "spi0" name= "SPI0" description= "SPI0 Signals" mask= "0x07" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "twiroutea" name= "TWIROUTEA" description= "TWI route A" offset= "0x06" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "twi0" name= "TWI0" description= "TWI0 Signals" mask= "0x03" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "tcaroutea" name= "TCAROUTEA" description= "TCA route A" offset= "0x07" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "tca0" name= "TCA0" description= "TCA0 Signals" mask= "0x07" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "tcbroutea" name= "TCBROUTEA" description= "TCB route A" offset= "0x08" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "tcb0" name= "TCB0" description= "TCB0 Output" mask= "0x01" access= "RW" />
<bit-field key= "tcb1" name= "TCB1" description= "TCB1 Output" mask= "0x02" access= "RW" />
<bit-field key= "tcb2" name= "TCB2" description= "TCB2 Output" mask= "0x04" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "tcdroutea" name= "TCDROUTEA" description= "TCD route A" offset= "0x09" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "tcd0" name= "TCD0" description= "TCD0 Signals" mask= "0x07" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "rst_integration_v8" name= "RSTCTRL" description= "Reset controller" >
<register-group key= "rstctrl" name= "RSTCTRL" >
2024-08-01 19:27:16 +01:00
<register key= "rstfr" name= "RSTFR" description= "Reset Flags" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "porf" name= "PORF" description= "Power on Reset flag" mask= "0x01" access= "RW" />
<bit-field key= "borf" name= "BORF" description= "Brown out detector Reset flag" mask= "0x02" access= "RW" />
<bit-field key= "extrf" name= "EXTRF" description= "External Reset flag" mask= "0x04" access= "RW" />
<bit-field key= "wdrf" name= "WDRF" description= "Watch dog Reset flag" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "swrf" name= "SWRF" description= "Software Reset flag" mask= "0x10" access= "RW" />
<bit-field key= "updirf" name= "UPDIRF" description= "UPDI Reset flag" mask= "0x20" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "swrr" name= "SWRR" description= "Software Reset" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "swrst" name= "SWRST" description= "Software reset enable" mask= "0x01" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "tmr_16b_rtc_v1" name= "RTC" description= "Real-Time Counter" >
<register-group key= "rtc" name= "RTC" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "rtcen" name= "RTCEN" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "corren" name= "CORREN" description= "Correction enable" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "prescaler" name= "PRESCALER" description= "Prescaling Factor" mask= "0x78" access= "RW" />
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run In Standby" mask= "0x80" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x01" size= "1" initial-value= "0x00" access= "R" >
<bit-field key= "ctrlabusy" name= "CTRLABUSY" description= "CTRLA Synchronization Busy Flag" mask= "0x01" access= "R" />
<bit-field key= "cntbusy" name= "CNTBUSY" description= "Count Synchronization Busy Flag" mask= "0x02" access= "R" />
<bit-field key= "perbusy" name= "PERBUSY" description= "Period Synchronization Busy Flag" mask= "0x04" access= "R" />
<bit-field key= "cmpbusy" name= "CMPBUSY" description= "Comparator Synchronization Busy Flag" mask= "0x08" access= "R" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Interrupt Control" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "ovf" name= "OVF" description= "Overflow Interrupt enable" mask= "0x01" access= "RW" />
<bit-field key= "cmp" name= "CMP" description= "Compare Match Interrupt enable" mask= "0x02" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "ovf" name= "OVF" description= "Overflow Interrupt Flag" mask= "0x01" access= "RW" />
<bit-field key= "cmp" name= "CMP" description= "Compare Match Interrupt" mask= "0x02" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "temp" name= "TEMP" description= "Temporary" offset= "0x04" size= "1" access= "RW" />
<register key= "dbgctrl" name= "DBGCTRL" description= "Debug control" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dbgrun" name= "DBGRUN" description= "Run in debug" mask= "0x01" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "calib" name= "CALIB" description= "Calibration" offset= "0x06" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "error" name= "ERROR" description= "Error Correction Value" mask= "0x7F" access= "RW" />
<bit-field key= "sign" name= "SIGN" description= "Error Correction Sign Bit" mask= "0x80" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "clksel" name= "CLKSEL" description= "Clock Select" offset= "0x07" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "clksel" name= "CLKSEL" description= "Clock Select" mask= "0x03" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "cnt" name= "CNT" description= "Counter" offset= "0x08" size= "2" access= "RW" />
<register key= "per" name= "PER" description= "Period" offset= "0x0A" size= "2" initial-value= "0xFFFF" access= "RW" />
<register key= "cmp" name= "CMP" description= "Compare" offset= "0x0C" size= "2" access= "RW" />
<register key= "pitctrla" name= "PITCTRLA" description= "PIT Control A" offset= "0x10" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "piten" name= "PITEN" description= "Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "period" name= "PERIOD" description= "Period" mask= "0x78" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "pitstatus" name= "PITSTATUS" description= "PIT Status" offset= "0x11" size= "1" initial-value= "0x00" access= "R" >
<bit-field key= "ctrlbusy" name= "CTRLBUSY" description= "CTRLA Synchronization Busy Flag" mask= "0x01" access= "R" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "pitintctrl" name= "PITINTCTRL" description= "PIT Interrupt Control" offset= "0x12" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "pi" name= "PI" description= "Periodic Interrupt" mask= "0x01" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "pitintflags" name= "PITINTFLAGS" description= "PIT Interrupt Flags" offset= "0x13" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "pi" name= "PI" description= "Periodic Interrupt" mask= "0x01" access= "RW" />
2024-02-09 00:03:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "pitdbgctrl" name= "PITDBGCTRL" description= "PIT Debug control" offset= "0x15" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dbgrun" name= "DBGRUN" description= "Run in debug" mask= "0x01" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_sigrow" name= "SIGROW" description= "Signature row" >
<register-group key= "sigrow" name= "SIGROW" >
2024-08-01 19:27:16 +01:00
<register key= "deviceid0" name= "DEVICEID0" description= "Device ID Byte 0" offset= "0x00" size= "1" access= "R" />
<register key= "deviceid1" name= "DEVICEID1" description= "Device ID Byte 1" offset= "0x01" size= "1" access= "R" />
<register key= "deviceid2" name= "DEVICEID2" description= "Device ID Byte 2" offset= "0x02" size= "1" access= "R" />
<register key= "tempsense0" name= "TEMPSENSE0" description= "Temperature Calibration 0" offset= "0x04" size= "2" access= "R" >
2024-03-14 23:59:15 +00:00
<bit-field key= "tempsense0" name= "TEMPSENSE0" description= "Temperature Calibration 0" mask= "0xFFFF" access= "R" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "tempsense1" name= "TEMPSENSE1" description= "Temperature Calibration 1" offset= "0x06" size= "2" access= "R" >
2024-03-14 23:59:15 +00:00
<bit-field key= "tempsense1" name= "TEMPSENSE1" description= "Temperature Calibration 1" mask= "0xFFFF" access= "R" />
</register>
<register key= "sernum0" name= "SERNUM0" description= "LOTNUM0" offset= "0x10" size= "1" access= "R" />
<register key= "sernum1" name= "SERNUM1" description= "LOTNUM1" offset= "0x11" size= "1" access= "R" />
<register key= "sernum2" name= "SERNUM2" description= "LOTNUM2" offset= "0x12" size= "1" access= "R" />
<register key= "sernum3" name= "SERNUM3" description= "LOTNUM3" offset= "0x13" size= "1" access= "R" />
<register key= "sernum4" name= "SERNUM4" description= "LOTNUM4" offset= "0x14" size= "1" access= "R" />
<register key= "sernum5" name= "SERNUM5" description= "LOTNUM5" offset= "0x15" size= "1" access= "R" />
<register key= "sernum6" name= "SERNUM6" description= "RANDOM" offset= "0x16" size= "1" access= "R" />
<register key= "sernum7" name= "SERNUM7" description= "SCRIBE" offset= "0x17" size= "1" access= "R" />
<register key= "sernum8" name= "SERNUM8" description= "XPOS0" offset= "0x18" size= "1" access= "R" />
<register key= "sernum9" name= "SERNUM9" description= "XPOS1" offset= "0x19" size= "1" access= "R" />
<register key= "sernum10" name= "SERNUM10" description= "YPOS0" offset= "0x1A" size= "1" access= "R" />
<register key= "sernum11" name= "SERNUM11" description= "YPOS1" offset= "0x1B" size= "1" access= "R" />
<register key= "sernum12" name= "SERNUM12" description= "RES0" offset= "0x1C" size= "1" access= "R" />
<register key= "sernum13" name= "SERNUM13" description= "RES1" offset= "0x1D" size= "1" access= "R" />
<register key= "sernum14" name= "SERNUM14" description= "RES2" offset= "0x1E" size= "1" access= "R" />
<register key= "sernum15" name= "SERNUM15" description= "RES3" offset= "0x1F" size= "1" access= "R" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "clk_sleep_ctrl_avr_v2" name= "SLPCTRL" description= "Sleep Controller" >
<register-group key= "slpctrl" name= "SLPCTRL" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "sen" name= "SEN" description= "Sleep enable" mask= "0x01" access= "RW" />
<bit-field key= "smode" name= "SMODE" description= "Sleep mode" mask= "0x06" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "vregctrl" name= "VREGCTRL" description= "Control B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "pmode" name= "PMODE" description= "Performance Mode" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "htllen" name= "HTLLEN" description= "High Temperature Low Leakage Enable" mask= "0x10" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "spi_8bit_v2" name= "SPI" description= "Serial Peripheral Interface" >
<register-group key= "spi" name= "SPI" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable Module" mask= "0x01" access= "RW" />
<bit-field key= "presc" name= "PRESC" description= "Prescaler" mask= "0x06" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "clk2x" name= "CLK2X" description= "Enable Double Speed" mask= "0x10" access= "RW" />
<bit-field key= "master" name= "MASTER" description= "Host Operation Enable" mask= "0x20" access= "RW" />
<bit-field key= "dord" name= "DORD" description= "Data Order Setting" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb" name= "CTRLB" description= "Control B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "mode" name= "MODE" description= "SPI Mode" mask= "0x03" access= "RW" />
<bit-field key= "ssd" name= "SSD" description= "SPI Select Disable" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "bufwr" name= "BUFWR" description= "Buffer Mode Wait for Receive" mask= "0x40" access= "RW" />
<bit-field key= "bufen" name= "BUFEN" description= "Buffer Mode Enable" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Interrupt Control" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "ie" name= "IE" description= "Interrupt Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "ssie" name= "SSIE" description= "SPI Select Trigger Interrupt Enable" mask= "0x10" access= "RW" />
<bit-field key= "dreie" name= "DREIE" description= "Data Register Empty Interrupt Enable" mask= "0x20" access= "RW" />
<bit-field key= "txcie" name= "TXCIE" description= "Transfer Complete Interrupt Enable" mask= "0x40" access= "RW" />
<bit-field key= "rxcie" name= "RXCIE" description= "Receive Complete Interrupt Enable" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "wrcol" name= "WRCOL" description= "Write Collision" mask= "0x40" access= "RW" />
<bit-field key= "if" name= "IF" description= "Interrupt Flag" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "data" name= "DATA" description= "Data" offset= "0x04" size= "1" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_syscfg" name= "SYSCFG" description= "System Configuration Registers" >
<register-group key= "syscfg" name= "SYSCFG" >
2024-08-01 19:27:16 +01:00
<register key= "revid" name= "REVID" description= "Revision ID" offset= "0x01" size= "1" access= "RW" />
<register key= "ocdmctrl" name= "OCDMCTRL" description= "OCD Message Control" offset= "0x04" size= "1" access= "RW" />
<register key= "ocdmstatus" name= "OCDMSTATUS" description= "OCD Message Status" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "valid" name= "VALID" description= "OCD Message Valid" mask= "0x01" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "tmr_16b_pwm_v1" name= "TCA" description= "16-bit Timer/Counter Type A" >
<register-group key= "tca" name= "TCA" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla_single_mode" name= "CTRLA_SINGLE_MODE" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Module Enable" mask= "0x01" access= "RW" />
<bit-field key= "clksel" name= "CLKSEL" description= "Clock Selection" mask= "0x0E" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run in Standby" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrla_split_mode" name= "CTRLA_SPLIT_MODE" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" alternative= "true" >
<bit-field key= "enable" name= "ENABLE" description= "Module Enable" mask= "0x01" access= "RW" />
<bit-field key= "clksel" name= "CLKSEL" description= "Clock Selection" mask= "0x0E" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run in Standby" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb_single_mode" name= "CTRLB_SINGLE_MODE" description= "Control B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "wgmode" name= "WGMODE" description= "Waveform generation mode" mask= "0x07" access= "RW" />
<bit-field key= "alupd" name= "ALUPD" description= "Auto Lock Update" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cmp0en" name= "CMP0EN" description= "Compare 0 Enable" mask= "0x10" access= "RW" />
<bit-field key= "cmp1en" name= "CMP1EN" description= "Compare 1 Enable" mask= "0x20" access= "RW" />
<bit-field key= "cmp2en" name= "CMP2EN" description= "Compare 2 Enable" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb_split_mode" name= "CTRLB_SPLIT_MODE" description= "Control B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" alternative= "true" >
<bit-field key= "lcmp0en" name= "LCMP0EN" description= "Low Compare 0 Enable" mask= "0x01" access= "RW" />
<bit-field key= "lcmp1en" name= "LCMP1EN" description= "Low Compare 1 Enable" mask= "0x02" access= "RW" />
<bit-field key= "lcmp2en" name= "LCMP2EN" description= "Low Compare 2 Enable" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "hcmp0en" name= "HCMP0EN" description= "High Compare 0 Enable" mask= "0x10" access= "RW" />
<bit-field key= "hcmp1en" name= "HCMP1EN" description= "High Compare 1 Enable" mask= "0x20" access= "RW" />
<bit-field key= "hcmp2en" name= "HCMP2EN" description= "High Compare 2 Enable" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlc_single_mode" name= "CTRLC_SINGLE_MODE" description= "Control C" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cmp0ov" name= "CMP0OV" description= "Compare 0 Waveform Output Value" mask= "0x01" access= "RW" />
<bit-field key= "cmp1ov" name= "CMP1OV" description= "Compare 1 Waveform Output Value" mask= "0x02" access= "RW" />
<bit-field key= "cmp2ov" name= "CMP2OV" description= "Compare 2 Waveform Output Value" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlc_split_mode" name= "CTRLC_SPLIT_MODE" description= "Control C" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" alternative= "true" >
<bit-field key= "lcmp0ov" name= "LCMP0OV" description= "Low Compare 0 Output Value" mask= "0x01" access= "RW" />
<bit-field key= "lcmp1ov" name= "LCMP1OV" description= "Low Compare 1 Output Value" mask= "0x02" access= "RW" />
<bit-field key= "lcmp2ov" name= "LCMP2OV" description= "Low Compare 2 Output Value" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "hcmp0ov" name= "HCMP0OV" description= "High Compare 0 Output Value" mask= "0x10" access= "RW" />
<bit-field key= "hcmp1ov" name= "HCMP1OV" description= "High Compare 1 Output Value" mask= "0x20" access= "RW" />
<bit-field key= "hcmp2ov" name= "HCMP2OV" description= "High Compare 2 Output Value" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrld_single_mode" name= "CTRLD_SINGLE_MODE" description= "Control D" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "splitm" name= "SPLITM" description= "Split Mode Enable" mask= "0x01" access= "RW" />
</register>
<register key= "ctrld_split_mode" name= "CTRLD_SPLIT_MODE" description= "Control D" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" alternative= "true" >
<bit-field key= "splitm" name= "SPLITM" description= "Split Mode Enable" mask= "0x01" access= "RW" />
</register>
<register key= "ctrleclr_single_mode" name= "CTRLECLR_SINGLE_MODE" description= "Control E Clear" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dir" name= "DIR" description= "Direction" mask= "0x01" access= "RW" />
<bit-field key= "lupd" name= "LUPD" description= "Lock Update" mask= "0x02" access= "RW" />
<bit-field key= "cmd" name= "CMD" description= "Command" mask= "0x0C" access= "RW" />
</register>
<register key= "ctrleclr_split_mode" name= "CTRLECLR_SPLIT_MODE" description= "Control E Clear" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" alternative= "true" >
<bit-field key= "cmden" name= "CMDEN" description= "Command Enable" mask= "0x03" access= "RW" />
<bit-field key= "cmd" name= "CMD" description= "Command" mask= "0x0C" access= "RW" />
</register>
<register key= "ctrleset_single_mode" name= "CTRLESET_SINGLE_MODE" description= "Control E Set" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dir" name= "DIR" description= "Direction" mask= "0x01" access= "RW" />
<bit-field key= "lupd" name= "LUPD" description= "Lock Update" mask= "0x02" access= "RW" />
<bit-field key= "cmd" name= "CMD" description= "Command" mask= "0x0C" access= "RW" />
</register>
<register key= "ctrleset_split_mode" name= "CTRLESET_SPLIT_MODE" description= "Control E Set" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" alternative= "true" >
<bit-field key= "cmden" name= "CMDEN" description= "Command Enable" mask= "0x03" access= "RW" />
<bit-field key= "cmd" name= "CMD" description= "Command" mask= "0x0C" access= "RW" />
</register>
<register key= "ctrlfclr_single_mode" name= "CTRLFCLR_SINGLE_MODE" description= "Control F Clear" offset= "0x06" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "perbv" name= "PERBV" description= "Period Buffer Valid" mask= "0x01" access= "RW" />
<bit-field key= "cmp0bv" name= "CMP0BV" description= "Compare 0 Buffer Valid" mask= "0x02" access= "RW" />
<bit-field key= "cmp1bv" name= "CMP1BV" description= "Compare 1 Buffer Valid" mask= "0x04" access= "RW" />
<bit-field key= "cmp2bv" name= "CMP2BV" description= "Compare 2 Buffer Valid" mask= "0x08" access= "RW" />
</register>
<register key= "ctrlfset_single_mode" name= "CTRLFSET_SINGLE_MODE" description= "Control F Set" offset= "0x07" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "perbv" name= "PERBV" description= "Period Buffer Valid" mask= "0x01" access= "RW" />
<bit-field key= "cmp0bv" name= "CMP0BV" description= "Compare 0 Buffer Valid" mask= "0x02" access= "RW" />
<bit-field key= "cmp1bv" name= "CMP1BV" description= "Compare 1 Buffer Valid" mask= "0x04" access= "RW" />
<bit-field key= "cmp2bv" name= "CMP2BV" description= "Compare 2 Buffer Valid" mask= "0x08" access= "RW" />
</register>
<register key= "evctrl_single_mode" name= "EVCTRL_SINGLE_MODE" description= "Event Control" offset= "0x09" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cntaei" name= "CNTAEI" description= "Count on Event Input A" mask= "0x01" access= "RW" />
<bit-field key= "evacta" name= "EVACTA" description= "Event Action A" mask= "0x0E" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cntbei" name= "CNTBEI" description= "Count on Event Input B" mask= "0x10" access= "RW" />
<bit-field key= "evactb" name= "EVACTB" description= "Event Action B" mask= "0xE0" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl_single_mode" name= "INTCTRL_SINGLE_MODE" description= "Interrupt Control" offset= "0x0A" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "ovf" name= "OVF" description= "Overflow Interrupt" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cmp0" name= "CMP0" description= "Compare 0 Interrupt" mask= "0x10" access= "RW" />
<bit-field key= "cmp1" name= "CMP1" description= "Compare 1 Interrupt" mask= "0x20" access= "RW" />
<bit-field key= "cmp2" name= "CMP2" description= "Compare 2 Interrupt" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl_split_mode" name= "INTCTRL_SPLIT_MODE" description= "Interrupt Control" offset= "0x0A" size= "1" initial-value= "0x00" access= "RW" alternative= "true" >
<bit-field key= "lunf" name= "LUNF" description= "Low Underflow Interrupt Enable" mask= "0x01" access= "RW" />
<bit-field key= "hunf" name= "HUNF" description= "High Underflow Interrupt Enable" mask= "0x02" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "lcmp0" name= "LCMP0" description= "Low Compare 0 Interrupt Enable" mask= "0x10" access= "RW" />
<bit-field key= "lcmp1" name= "LCMP1" description= "Low Compare 1 Interrupt Enable" mask= "0x20" access= "RW" />
<bit-field key= "lcmp2" name= "LCMP2" description= "Low Compare 2 Interrupt Enable" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags_single_mode" name= "INTFLAGS_SINGLE_MODE" description= "Interrupt Flags" offset= "0x0B" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "ovf" name= "OVF" description= "Overflow Interrupt" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cmp0" name= "CMP0" description= "Compare 0 Interrupt" mask= "0x10" access= "RW" />
<bit-field key= "cmp1" name= "CMP1" description= "Compare 1 Interrupt" mask= "0x20" access= "RW" />
<bit-field key= "cmp2" name= "CMP2" description= "Compare 2 Interrupt" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags_split_mode" name= "INTFLAGS_SPLIT_MODE" description= "Interrupt Flags" offset= "0x0B" size= "1" initial-value= "0x00" access= "RW" alternative= "true" >
<bit-field key= "lunf" name= "LUNF" description= "Low Underflow Interrupt Flag" mask= "0x01" access= "RW" />
<bit-field key= "hunf" name= "HUNF" description= "High Underflow Interrupt Flag" mask= "0x02" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "lcmp0" name= "LCMP0" description= "Low Compare 2 Interrupt Flag" mask= "0x10" access= "RW" />
<bit-field key= "lcmp1" name= "LCMP1" description= "Low Compare 1 Interrupt Flag" mask= "0x20" access= "RW" />
<bit-field key= "lcmp2" name= "LCMP2" description= "Low Compare 0 Interrupt Flag" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "dbgctrl_single_mode" name= "DBGCTRL_SINGLE_MODE" description= "Debug Control" offset= "0x0E" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dbgrun" name= "DBGRUN" description= "Debug Run" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "dbgctrl_split_mode" name= "DBGCTRL_SPLIT_MODE" description= "Debug Control" offset= "0x0E" size= "1" initial-value= "0x00" access= "RW" alternative= "true" >
<bit-field key= "dbgrun" name= "DBGRUN" description= "Debug Run" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "temp_single_mode" name= "TEMP_SINGLE_MODE" description= "Temporary data for 16-bit Access" offset= "0x0F" size= "1" access= "RW" />
2024-03-14 23:59:15 +00:00
<register key= "cnt_single_mode" name= "CNT_SINGLE_MODE" description= "Count" offset= "0x20" size= "2" access= "RW" />
<register key= "lcnt_split_mode" name= "LCNT_SPLIT_MODE" description= "Low Count" offset= "0x20" size= "1" access= "RW" alternative= "true" />
<register key= "hcnt_split_mode" name= "HCNT_SPLIT_MODE" description= "High Count" offset= "0x21" size= "1" access= "RW" alternative= "true" />
<register key= "per_single_mode" name= "PER_SINGLE_MODE" description= "Period" offset= "0x26" size= "2" access= "RW" />
<register key= "lper_split_mode" name= "LPER_SPLIT_MODE" description= "Low Period" offset= "0x26" size= "1" access= "RW" alternative= "true" />
<register key= "hper_split_mode" name= "HPER_SPLIT_MODE" description= "High Period" offset= "0x27" size= "1" access= "RW" alternative= "true" />
<register key= "cmp0_single_mode" name= "CMP0_SINGLE_MODE" description= "Compare 0" offset= "0x28" size= "2" access= "RW" />
<register key= "lcmp0_split_mode" name= "LCMP0_SPLIT_MODE" description= "Low Compare" offset= "0x28" size= "1" access= "RW" alternative= "true" />
<register key= "hcmp0_split_mode" name= "HCMP0_SPLIT_MODE" description= "High Compare" offset= "0x29" size= "1" access= "RW" alternative= "true" />
<register key= "cmp1_single_mode" name= "CMP1_SINGLE_MODE" description= "Compare 1" offset= "0x2A" size= "2" access= "RW" />
<register key= "lcmp1_split_mode" name= "LCMP1_SPLIT_MODE" description= "Low Compare" offset= "0x2A" size= "1" access= "RW" alternative= "true" />
<register key= "hcmp1_split_mode" name= "HCMP1_SPLIT_MODE" description= "High Compare" offset= "0x2B" size= "1" access= "RW" alternative= "true" />
<register key= "cmp2_single_mode" name= "CMP2_SINGLE_MODE" description= "Compare 2" offset= "0x2C" size= "2" access= "RW" />
<register key= "lcmp2_split_mode" name= "LCMP2_SPLIT_MODE" description= "Low Compare" offset= "0x2C" size= "1" access= "RW" alternative= "true" />
<register key= "hcmp2_split_mode" name= "HCMP2_SPLIT_MODE" description= "High Compare" offset= "0x2D" size= "1" access= "RW" alternative= "true" />
<register key= "perbuf_single_mode" name= "PERBUF_SINGLE_MODE" description= "Period Buffer" offset= "0x36" size= "2" access= "RW" />
<register key= "cmp0buf_single_mode" name= "CMP0BUF_SINGLE_MODE" description= "Compare 0 Buffer" offset= "0x38" size= "2" access= "RW" />
<register key= "cmp1buf_single_mode" name= "CMP1BUF_SINGLE_MODE" description= "Compare 1 Buffer" offset= "0x3A" size= "2" access= "RW" />
<register key= "cmp2buf_single_mode" name= "CMP2BUF_SINGLE_MODE" description= "Compare 2 Buffer" offset= "0x3C" size= "2" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "tmr_16b_capture_v1" name= "TCB" description= "16-bit Timer Type B" >
<register-group key= "tcb" name= "TCB" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "clksel" name= "CLKSEL" description= "Clock Select" mask= "0x0E" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "syncupd" name= "SYNCUPD" description= "Synchronize Update" mask= "0x10" access= "RW" />
<bit-field key= "cascade" name= "CASCADE" description= "Cascade two timers" mask= "0x20" access= "RW" />
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run Standby" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb" name= "CTRLB" description= "Control Register B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cntmode" name= "CNTMODE" description= "Timer Mode" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "ccmpen" name= "CCMPEN" description= "Pin Output Enable" mask= "0x10" access= "RW" />
<bit-field key= "ccmpinit" name= "CCMPINIT" description= "Pin Initial State" mask= "0x20" access= "RW" />
<bit-field key= "async" name= "ASYNC" description= "Asynchronous Enable" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "evctrl" name= "EVCTRL" description= "Event Control" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "captei" name= "CAPTEI" description= "Event Input Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "edge" name= "EDGE" description= "Event Edge" mask= "0x10" access= "RW" />
<bit-field key= "filter" name= "FILTER" description= "Input Capture Noise Cancellation Filter" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Interrupt Control" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "capt" name= "CAPT" description= "Capture or Timeout" mask= "0x01" access= "RW" />
<bit-field key= "ovf" name= "OVF" description= "Overflow" mask= "0x02" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x06" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "capt" name= "CAPT" description= "Capture or Timeout" mask= "0x01" access= "RW" />
<bit-field key= "ovf" name= "OVF" description= "Overflow" mask= "0x02" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x07" size= "1" initial-value= "0x00" access= "R" >
<bit-field key= "run" name= "RUN" description= "Run" mask= "0x01" access= "R" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "dbgctrl" name= "DBGCTRL" description= "Debug Control" offset= "0x08" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dbgrun" name= "DBGRUN" description= "Debug Run" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "temp" name= "TEMP" description= "Temporary Value" offset= "0x09" size= "1" access= "RW" />
<register key= "cnt" name= "CNT" description= "Count" offset= "0x0A" size= "2" initial-value= "0x0000" access= "RW" />
<register key= "ccmp" name= "CCMP" description= "Compare or Capture" offset= "0x0C" size= "2" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "tmr_12b_psc_v1" name= "TCD" description= "Timer Counter D" >
<register-group key= "tcd" name= "TCD" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "syncpres" name= "SYNCPRES" description= "Synchronization prescaler" mask= "0x06" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cntpres" name= "CNTPRES" description= "Counter prescaler" mask= "0x18" access= "RW" />
<bit-field key= "clksel" name= "CLKSEL" description= "Clock select" mask= "0x60" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb" name= "CTRLB" description= "Control B" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "wgmode" name= "WGMODE" description= "Waveform generation mode" mask= "0x03" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlc" name= "CTRLC" description= "Control C" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cmpovr" name= "CMPOVR" description= "Compare output value override" mask= "0x01" access= "RW" />
<bit-field key= "aupdate" name= "AUPDATE" description= "Auto update" mask= "0x02" access= "RW" />
<bit-field key= "fifty" name= "FIFTY" description= "Fifty percent waveform" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cmpcsel" name= "CMPCSEL" description= "Compare C output select" mask= "0x40" access= "RW" />
<bit-field key= "cmpdsel" name= "CMPDSEL" description= "Compare D output select" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrld" name= "CTRLD" description= "Control D" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cmpaval" name= "CMPAVAL" description= "Compare A value" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cmpbval" name= "CMPBVAL" description= "Compare B value" mask= "0xF0" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrle" name= "CTRLE" description= "Control E" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "synceoc" name= "SYNCEOC" description= "Synchronize end of cycle strobe" mask= "0x01" access= "RW" />
<bit-field key= "sync" name= "SYNC" description= "synchronize strobe" mask= "0x02" access= "RW" />
<bit-field key= "restart" name= "RESTART" description= "Restart strobe" mask= "0x04" access= "RW" />
<bit-field key= "scapturea" name= "SCAPTUREA" description= "Software Capture A Strobe" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "scaptureb" name= "SCAPTUREB" description= "Software Capture B Strobe" mask= "0x10" access= "RW" />
<bit-field key= "diseoc" name= "DISEOC" description= "Disable at end of cycle" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "evctrla" name= "EVCTRLA" description= "EVCTRLA" offset= "0x08" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "trigei" name= "TRIGEI" description= "Trigger event enable" mask= "0x01" access= "RW" />
<bit-field key= "action" name= "ACTION" description= "Event action" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "edge" name= "EDGE" description= "Edge select" mask= "0x10" access= "RW" />
<bit-field key= "cfg" name= "CFG" description= "Event config" mask= "0xC0" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "evctrlb" name= "EVCTRLB" description= "EVCTRLB" offset= "0x09" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "trigei" name= "TRIGEI" description= "Trigger event enable" mask= "0x01" access= "RW" />
<bit-field key= "action" name= "ACTION" description= "Event action" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "edge" name= "EDGE" description= "Edge select" mask= "0x10" access= "RW" />
<bit-field key= "cfg" name= "CFG" description= "Event config" mask= "0xC0" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Interrupt Control" offset= "0x0C" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "ovf" name= "OVF" description= "Overflow interrupt enable" mask= "0x01" access= "RW" />
<bit-field key= "triga" name= "TRIGA" description= "Trigger A interrupt enable" mask= "0x04" access= "RW" />
<bit-field key= "trigb" name= "TRIGB" description= "Trigger B interrupt enable" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x0D" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "ovf" name= "OVF" description= "Overflow interrupt enable" mask= "0x01" access= "RW" />
<bit-field key= "triga" name= "TRIGA" description= "Trigger A interrupt enable" mask= "0x04" access= "RW" />
<bit-field key= "trigb" name= "TRIGB" description= "Trigger B interrupt enable" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x0E" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enrdy" name= "ENRDY" description= "Enable ready" mask= "0x01" access= "R" />
<bit-field key= "cmdrdy" name= "CMDRDY" description= "Command ready" mask= "0x02" access= "R" />
2024-03-14 23:59:15 +00:00
<bit-field key= "pwmacta" name= "PWMACTA" description= "PWM activity on A" mask= "0x40" access= "RW" />
<bit-field key= "pwmactb" name= "PWMACTB" description= "PWM activity on B" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "inputctrla" name= "INPUTCTRLA" description= "Input Control A" offset= "0x10" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "inputmode" name= "INPUTMODE" description= "Input mode" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "inputctrlb" name= "INPUTCTRLB" description= "Input Control B" offset= "0x11" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "inputmode" name= "INPUTMODE" description= "Input mode" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "faultctrl" name= "FAULTCTRL" description= "Fault Control" offset= "0x12" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "cmpa" name= "CMPA" description= "Compare A value" mask= "0x01" access= "RW" />
<bit-field key= "cmpb" name= "CMPB" description= "Compare B value" mask= "0x02" access= "RW" />
<bit-field key= "cmpc" name= "CMPC" description= "Compare C value" mask= "0x04" access= "RW" />
<bit-field key= "cmpd" name= "CMPD" description= "Compare D vaule" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "cmpaen" name= "CMPAEN" description= "Compare A enable" mask= "0x10" access= "RW" />
<bit-field key= "cmpben" name= "CMPBEN" description= "Compare B enable" mask= "0x20" access= "RW" />
<bit-field key= "cmpcen" name= "CMPCEN" description= "Compare C enable" mask= "0x40" access= "RW" />
<bit-field key= "cmpden" name= "CMPDEN" description= "Compare D enable" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "dlyctrl" name= "DLYCTRL" description= "Delay Control" offset= "0x14" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dlysel" name= "DLYSEL" description= "Delay select" mask= "0x03" access= "RW" />
<bit-field key= "dlytrig" name= "DLYTRIG" description= "Delay trigger" mask= "0x0C" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "dlypresc" name= "DLYPRESC" description= "Delay prescaler" mask= "0x30" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "dlyval" name= "DLYVAL" description= "Delay value" offset= "0x15" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "dlyval" name= "DLYVAL" description= "Delay value" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ditctrl" name= "DITCTRL" description= "Dither Control A" offset= "0x18" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dithersel" name= "DITHERSEL" description= "Dither select" mask= "0x03" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "ditval" name= "DITVAL" description= "Dither value" offset= "0x19" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dither" name= "DITHER" description= "Dither value" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "dbgctrl" name= "DBGCTRL" description= "Debug Control" offset= "0x1E" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dbgrun" name= "DBGRUN" description= "Debug run" mask= "0x01" access= "RW" />
<bit-field key= "faultdet" name= "FAULTDET" description= "Fault detection" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
<register key= "capturea" name= "CAPTUREA" description= "Capture A" offset= "0x22" size= "2" access= "R" />
<register key= "captureb" name= "CAPTUREB" description= "Capture B" offset= "0x24" size= "2" access= "R" />
<register key= "cmpaset" name= "CMPASET" description= "Compare A Set" offset= "0x28" size= "2" access= "RW" />
<register key= "cmpaclr" name= "CMPACLR" description= "Compare A Clear" offset= "0x2A" size= "2" access= "RW" />
<register key= "cmpbset" name= "CMPBSET" description= "Compare B Set" offset= "0x2C" size= "2" access= "RW" />
<register key= "cmpbclr" name= "CMPBCLR" description= "Compare B Clear" offset= "0x2E" size= "2" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "i2c_8bit_avr_v3" name= "TWI" description= "Two-Wire Interface" >
<register-group key= "twi" name= "TWI" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "fmpen" name= "FMPEN" description= "Fast-mode Plus Enable" mask= "0x02" access= "RW" />
<bit-field key= "sdahold" name= "SDAHOLD" description= "SDA Hold Time" mask= "0x0C" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "sdasetup" name= "SDASETUP" description= "SDA Setup Time" mask= "0x10" access= "RW" />
<bit-field key= "inputlvl" name= "INPUTLVL" description= "Input voltage transition level" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "dualctrl" name= "DUALCTRL" description= "Dual Mode Control" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "fmpen" name= "FMPEN" description= "Fast-mode Plus Enable" mask= "0x02" access= "RW" />
<bit-field key= "sdahold" name= "SDAHOLD" description= "SDA Hold Time" mask= "0x0C" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "inputlvl" name= "INPUTLVL" description= "Input voltage transition level" mask= "0x40" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "dbgctrl" name= "DBGCTRL" description= "Debug Control" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dbgrun" name= "DBGRUN" description= "Debug Run" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "mctrla" name= "MCTRLA" description= "Host Control A" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "smen" name= "SMEN" description= "Smart Mode Enable" mask= "0x02" access= "RW" />
<bit-field key= "timeout" name= "TIMEOUT" description= "Inactive Bus Time-Out" mask= "0x0C" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "qcen" name= "QCEN" description= "Quick Command Enable" mask= "0x10" access= "RW" />
<bit-field key= "wien" name= "WIEN" description= "Write Interrupt Enable" mask= "0x40" access= "RW" />
<bit-field key= "rien" name= "RIEN" description= "Read Interrupt Enable" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "mctrlb" name= "MCTRLB" description= "Host Control B" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "mcmd" name= "MCMD" description= "Command" mask= "0x03" access= "RW" />
<bit-field key= "ackact" name= "ACKACT" description= "Acknowledge Action" mask= "0x04" access= "RW" />
<bit-field key= "flush" name= "FLUSH" description= "Flush" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "mstatus" name= "MSTATUS" description= "Host STATUS" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "busstate" name= "BUSSTATE" description= "Bus State" mask= "0x03" access= "RW" />
<bit-field key= "buserr" name= "BUSERR" description= "Bus Error" mask= "0x04" access= "RW" />
<bit-field key= "arblost" name= "ARBLOST" description= "Arbitration Lost" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "rxack" name= "RXACK" description= "Received Acknowledge" mask= "0x10" access= "RW" />
<bit-field key= "clkhold" name= "CLKHOLD" description= "Clock Hold" mask= "0x20" access= "RW" />
<bit-field key= "wif" name= "WIF" description= "Write Interrupt Flag" mask= "0x40" access= "RW" />
<bit-field key= "rif" name= "RIF" description= "Read Interrupt Flag" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "mbaud" name= "MBAUD" description= "Host Baud Rate" offset= "0x06" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "baud" name= "BAUD" description= "Baud Rate" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "maddr" name= "MADDR" description= "Host Address" offset= "0x07" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "addr" name= "ADDR" description= "Address" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "mdata" name= "MDATA" description= "Host Data" offset= "0x08" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "data" name= "DATA" description= "Data" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "sctrla" name= "SCTRLA" description= "Client Control A" offset= "0x09" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "smen" name= "SMEN" description= "Smart Mode Enable" mask= "0x02" access= "RW" />
<bit-field key= "pmen" name= "PMEN" description= "Address Recognition Mode" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "pien" name= "PIEN" description= "Stop Interrupt Enable" mask= "0x20" access= "RW" />
<bit-field key= "apien" name= "APIEN" description= "Address or Stop Interrupt Enable" mask= "0x40" access= "RW" />
<bit-field key= "dien" name= "DIEN" description= "Data Interrupt Enable" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "sctrlb" name= "SCTRLB" description= "Client Control B" offset= "0x0A" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "scmd" name= "SCMD" description= "Command" mask= "0x03" access= "RW" />
<bit-field key= "ackact" name= "ACKACT" description= "Acknowledge Action" mask= "0x04" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "sstatus" name= "SSTATUS" description= "Client Status" offset= "0x0B" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "ap" name= "AP" description= "Address or Stop" mask= "0x01" access= "RW" />
<bit-field key= "dir" name= "DIR" description= "Read/Write Direction" mask= "0x02" access= "RW" />
<bit-field key= "buserr" name= "BUSERR" description= "Bus Error" mask= "0x04" access= "RW" />
<bit-field key= "coll" name= "COLL" description= "Collision" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "rxack" name= "RXACK" description= "Received Acknowledge" mask= "0x10" access= "RW" />
<bit-field key= "clkhold" name= "CLKHOLD" description= "Clock Hold" mask= "0x20" access= "RW" />
<bit-field key= "apif" name= "APIF" description= "Address or Stop Interrupt Flag" mask= "0x40" access= "RW" />
<bit-field key= "dif" name= "DIF" description= "Data Interrupt Flag" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "saddr" name= "SADDR" description= "Client Address" offset= "0x0C" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "addr" name= "ADDR" description= "Address" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "sdata" name= "SDATA" description= "Client Data" offset= "0x0D" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "data" name= "DATA" description= "Data" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "saddrmask" name= "SADDRMASK" description= "Client Address Mask" offset= "0x0E" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "addren" name= "ADDREN" description= "Address Mask Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "addrmask" name= "ADDRMASK" description= "Address Mask" mask= "0xFE" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "uart_autobd_v4" name= "USART" description= "Universal Synchronous and Asynchronous Receiver and Transmitter" >
<register-group key= "usart" name= "USART" >
2024-08-01 19:27:16 +01:00
<register key= "rxdatal" name= "RXDATAL" description= "Receive Data Low Byte" offset= "0x00" size= "1" initial-value= "0x00" access= "R" >
2024-03-14 23:59:15 +00:00
<bit-field key= "data" name= "DATA" description= "RX Data" mask= "0xFF" access= "R" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "rxdatah" name= "RXDATAH" description= "Receive Data High Byte" offset= "0x01" size= "1" initial-value= "0x00" access= "R" >
<bit-field key= "data8" name= "DATA8" description= "Receiver Data Register" mask= "0x01" access= "R" />
<bit-field key= "perr" name= "PERR" description= "Parity Error" mask= "0x02" access= "R" />
<bit-field key= "ferr" name= "FERR" description= "Frame Error" mask= "0x04" access= "R" />
2024-03-14 23:59:15 +00:00
<bit-field key= "bufovf" name= "BUFOVF" description= "Buffer Overflow" mask= "0x40" access= "R" />
<bit-field key= "rxcif" name= "RXCIF" description= "Receive Complete Interrupt Flag" mask= "0x80" access= "R" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "txdatal" name= "TXDATAL" description= "Transmit Data Low Byte" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "data" name= "DATA" description= "Transmit Data Register" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "txdatah" name= "TXDATAH" description= "Transmit Data High Byte" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "data8" name= "DATA8" description= "Transmit Data Register (CHSIZE=9bit)" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "wfb" name= "WFB" description= "Wait For Break" mask= "0x01" access= "RW" />
<bit-field key= "bdf" name= "BDF" description= "Break Detected Flag" mask= "0x02" access= "RW" />
<bit-field key= "isfif" name= "ISFIF" description= "Inconsistent Sync Field Interrupt Flag" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "rxsif" name= "RXSIF" description= "Receive Start Interrupt" mask= "0x10" access= "RW" />
<bit-field key= "dreif" name= "DREIF" description= "Data Register Empty Flag" mask= "0x20" access= "R" />
<bit-field key= "txcif" name= "TXCIF" description= "Transmit Interrupt Flag" mask= "0x40" access= "RW" />
<bit-field key= "rxcif" name= "RXCIF" description= "Receive Complete Interrupt Flag" mask= "0x80" access= "R" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x05" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "rs485" name= "RS485" description= "RS485 Mode internal transmitter" mask= "0x01" access= "RW" />
<bit-field key= "abeie" name= "ABEIE" description= "Auto-baud Error Interrupt Enable" mask= "0x04" access= "RW" />
<bit-field key= "lbme" name= "LBME" description= "Loop-back Mode Enable" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "rxsie" name= "RXSIE" description= "Receiver Start Frame Interrupt Enable" mask= "0x10" access= "RW" />
<bit-field key= "dreie" name= "DREIE" description= "Data Register Empty Interrupt Enable" mask= "0x20" access= "RW" />
<bit-field key= "txcie" name= "TXCIE" description= "Transmit Complete Interrupt Enable" mask= "0x40" access= "RW" />
<bit-field key= "rxcie" name= "RXCIE" description= "Receive Complete Interrupt Enable" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlb" name= "CTRLB" description= "Control B" offset= "0x06" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "mpcm" name= "MPCM" description= "Multi-processor Communication Mode" mask= "0x01" access= "RW" />
<bit-field key= "rxmode" name= "RXMODE" description= "Receiver Mode" mask= "0x06" access= "RW" />
<bit-field key= "odme" name= "ODME" description= "Open Drain Mode Enable" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "sfden" name= "SFDEN" description= "Start Frame Detection Enable" mask= "0x10" access= "RW" />
<bit-field key= "txen" name= "TXEN" description= "Transmitter Enable" mask= "0x40" access= "RW" />
<bit-field key= "rxen" name= "RXEN" description= "Reciever enable" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "ctrlc" name= "CTRLC" description= "Control C" offset= "0x07" size= "1" initial-value= "0x03" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "cmode" name= "CMODE" description= "Communication Mode" mask= "0xC0" access= "RW" />
2024-08-01 19:27:16 +01:00
<bit-field key= "chsize" name= "CHSIZE" description= "Character Size" mask= "0x07" access= "RW" />
<bit-field key= "sbmode" name= "SBMODE" description= "Stop Bit Mode" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "pmode" name= "PMODE" description= "Parity Mode" mask= "0x30" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "baud" name= "BAUD" description= "Baud Rate" offset= "0x08" size= "2" initial-value= "0x0000" access= "RW" />
<register key= "ctrld" name= "CTRLD" description= "Control D" offset= "0x0A" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "abw" name= "ABW" description= "Auto Baud Window" mask= "0xC0" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "dbgctrl" name= "DBGCTRL" description= "Debug Control" offset= "0x0B" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "dbgrun" name= "DBGRUN" description= "Debug Run" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "evctrl" name= "EVCTRL" description= "Event Control" offset= "0x0C" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "irei" name= "IREI" description= "IrDA Event Input Enable" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "txplctrl" name= "TXPLCTRL" description= "IRCOM Transmitter Pulse Length Control" offset= "0x0D" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "txpl" name= "TXPL" description= "Transmit pulse length" mask= "0xFF" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "rxplctrl" name= "RXPLCTRL" description= "IRCOM Receiver Pulse Length Control" offset= "0x0E" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "rxpl" name= "RXPL" description= "Receiver Pulse Lenght" mask= "0x7F" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_userrow" name= "USERROW" description= "User Row" >
<register-group key= "userrow" name= "USERROW" >
2024-08-01 19:27:16 +01:00
<register key= "userrow0" name= "USERROW0" description= "User Row Byte 0" offset= "0x00" size= "1" access= "RW" />
<register key= "userrow1" name= "USERROW1" description= "User Row Byte 1" offset= "0x01" size= "1" access= "RW" />
<register key= "userrow2" name= "USERROW2" description= "User Row Byte 2" offset= "0x02" size= "1" access= "RW" />
<register key= "userrow3" name= "USERROW3" description= "User Row Byte 3" offset= "0x03" size= "1" access= "RW" />
<register key= "userrow4" name= "USERROW4" description= "User Row Byte 4" offset= "0x04" size= "1" access= "RW" />
<register key= "userrow5" name= "USERROW5" description= "User Row Byte 5" offset= "0x05" size= "1" access= "RW" />
<register key= "userrow6" name= "USERROW6" description= "User Row Byte 6" offset= "0x06" size= "1" access= "RW" />
<register key= "userrow7" name= "USERROW7" description= "User Row Byte 7" offset= "0x07" size= "1" access= "RW" />
<register key= "userrow8" name= "USERROW8" description= "User Row Byte 8" offset= "0x08" size= "1" access= "RW" />
<register key= "userrow9" name= "USERROW9" description= "User Row Byte 9" offset= "0x09" size= "1" access= "RW" />
<register key= "userrow10" name= "USERROW10" description= "User Row Byte 10" offset= "0x0A" size= "1" access= "RW" />
<register key= "userrow11" name= "USERROW11" description= "User Row Byte 11" offset= "0x0B" size= "1" access= "RW" />
<register key= "userrow12" name= "USERROW12" description= "User Row Byte 12" offset= "0x0C" size= "1" access= "RW" />
<register key= "userrow13" name= "USERROW13" description= "User Row Byte 13" offset= "0x0D" size= "1" access= "RW" />
<register key= "userrow14" name= "USERROW14" description= "User Row Byte 14" offset= "0x0E" size= "1" access= "RW" />
<register key= "userrow15" name= "USERROW15" description= "User Row Byte 15" offset= "0x0F" size= "1" access= "RW" />
2024-03-14 23:59:15 +00:00
<register key= "userrow16" name= "USERROW16" description= "User Row Byte 16" offset= "0x10" size= "1" access= "RW" />
<register key= "userrow17" name= "USERROW17" description= "User Row Byte 17" offset= "0x11" size= "1" access= "RW" />
<register key= "userrow18" name= "USERROW18" description= "User Row Byte 18" offset= "0x12" size= "1" access= "RW" />
<register key= "userrow19" name= "USERROW19" description= "User Row Byte 19" offset= "0x13" size= "1" access= "RW" />
<register key= "userrow20" name= "USERROW20" description= "User Row Byte 20" offset= "0x14" size= "1" access= "RW" />
<register key= "userrow21" name= "USERROW21" description= "User Row Byte 21" offset= "0x15" size= "1" access= "RW" />
<register key= "userrow22" name= "USERROW22" description= "User Row Byte 22" offset= "0x16" size= "1" access= "RW" />
<register key= "userrow23" name= "USERROW23" description= "User Row Byte 23" offset= "0x17" size= "1" access= "RW" />
<register key= "userrow24" name= "USERROW24" description= "User Row Byte 24" offset= "0x18" size= "1" access= "RW" />
<register key= "userrow25" name= "USERROW25" description= "User Row Byte 25" offset= "0x19" size= "1" access= "RW" />
<register key= "userrow26" name= "USERROW26" description= "User Row Byte 26" offset= "0x1A" size= "1" access= "RW" />
<register key= "userrow27" name= "USERROW27" description= "User Row Byte 27" offset= "0x1B" size= "1" access= "RW" />
<register key= "userrow28" name= "USERROW28" description= "User Row Byte 28" offset= "0x1C" size= "1" access= "RW" />
<register key= "userrow29" name= "USERROW29" description= "User Row Byte 29" offset= "0x1D" size= "1" access= "RW" />
<register key= "userrow30" name= "USERROW30" description= "User Row Byte 30" offset= "0x1E" size= "1" access= "RW" />
<register key= "userrow31" name= "USERROW31" description= "User Row Byte 31" offset= "0x1F" size= "1" access= "RW" />
2023-12-13 20:33:41 +00:00
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "gpio_ports_avr_v2_vport" name= "VPORT" description= "Virtual Ports" >
<register-group key= "vport" name= "VPORT" >
2024-08-01 19:27:16 +01:00
<register key= "dir" name= "DIR" description= "Data Direction" offset= "0x00" size= "1" access= "RW" />
<register key= "out" name= "OUT" description= "Output Value" offset= "0x01" size= "1" access= "RW" />
<register key= "in" name= "IN" description= "Input Value" offset= "0x02" size= "1" access= "RW" />
<register key= "intflags" name= "INTFLAGS" description= "Interrupt Flags" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
2024-03-14 23:59:15 +00:00
<bit-field key= "int" name= "INT" description= "Pin Interrupt Flag" mask= "0xFF" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "avrdd_vref" name= "VREF" description= "Voltage reference" >
<register-group key= "vref" name= "VREF" >
2024-08-01 19:27:16 +01:00
<register key= "adc0ref" name= "ADC0REF" description= "ADC0 Reference" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "refsel" name= "REFSEL" description= "Reference select" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "alwayson" name= "ALWAYSON" description= "Always on" mask= "0x80" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "dac0ref" name= "DAC0REF" description= "DAC0 Reference" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "refsel" name= "REFSEL" description= "Reference select" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "alwayson" name= "ALWAYSON" description= "Always on" mask= "0x80" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "acref" name= "ACREF" description= "AC Reference" offset= "0x04" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "refsel" name= "REFSEL" description= "Reference select" mask= "0x07" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "alwayson" name= "ALWAYSON" description= "Always on" mask= "0x80" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "wdt_windowed_v2" name= "WDT" description= "Watch-Dog Timer" >
<register-group key= "wdt" name= "WDT" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "period" name= "PERIOD" description= "Period" mask= "0x0F" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "window" name= "WINDOW" description= "Window" mask= "0xF0" access= "RW" />
2023-12-13 20:40:14 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x01" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "syncbusy" name= "SYNCBUSY" description= "Syncronization busy" mask= "0x01" access= "R" />
2024-03-14 23:59:15 +00:00
<bit-field key= "lock" name= "LOCK" description= "Lock enable" mask= "0x80" access= "RW" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
2024-02-09 00:03:15 +00:00
<module key= "cmp_zxover_ctrl_v3" name= "ZCD" description= "Zero Cross Detect" >
<register-group key= "zcd" name= "ZCD" >
2024-08-01 19:27:16 +01:00
<register key= "ctrla" name= "CTRLA" description= "Control A" offset= "0x00" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "enable" name= "ENABLE" description= "Enable" mask= "0x01" access= "RW" />
<bit-field key= "invert" name= "INVERT" description= "Invert signal from pin" mask= "0x08" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "outen" name= "OUTEN" description= "Output Pad Enable" mask= "0x40" access= "RW" />
<bit-field key= "runstdby" name= "RUNSTDBY" description= "Run in Standby Mode" mask= "0x80" access= "RW" />
</register>
2024-08-01 19:27:16 +01:00
<register key= "intctrl" name= "INTCTRL" description= "Interrupt Control" offset= "0x02" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "intmode" name= "INTMODE" description= "Interrupt Mode" mask= "0x03" access= "RW" />
2024-03-14 23:59:15 +00:00
</register>
2024-08-01 19:27:16 +01:00
<register key= "status" name= "STATUS" description= "Status" offset= "0x03" size= "1" initial-value= "0x00" access= "RW" >
<bit-field key= "crossif" name= "CROSSIF" description= "ZCD Interrupt Flag" mask= "0x01" access= "RW" />
2024-03-14 23:59:15 +00:00
<bit-field key= "state" name= "STATE" description= "ZCD State" mask= "0x10" access= "R" />
2023-12-13 20:33:41 +00:00
</register>
</register-group>
</module>
</modules>
<pinouts >
2024-02-09 00:03:15 +00:00
<pinout key= "qfn32mvio" name= "QFN32MVIO" type= "qfn" >
<pin position= "1" pad= "PA3" />
<pin position= "2" pad= "PA4" />
<pin position= "3" pad= "PA5" />
<pin position= "4" pad= "PA6" />
<pin position= "5" pad= "PA7" />
<pin position= "6" pad= "PC0" />
<pin position= "7" pad= "PC1" />
<pin position= "8" pad= "PC2" />
<pin position= "9" pad= "PC3" />
<pin position= "10" pad= "VDDIO2" />
<pin position= "11" pad= "PD1" />
<pin position= "12" pad= "PD2" />
<pin position= "13" pad= "PD3" />
<pin position= "14" pad= "PD4" />
<pin position= "15" pad= "PD5" />
<pin position= "16" pad= "PD6" />
<pin position= "17" pad= "PD7" />
<pin position= "18" pad= "AVDD" />
<pin position= "19" pad= "AGND" />
<pin position= "20" pad= "PF0" />
<pin position= "21" pad= "PF1" />
<pin position= "22" pad= "PF2" />
<pin position= "23" pad= "PF3" />
<pin position= "24" pad= "PF4" />
<pin position= "25" pad= "PF5" />
<pin position= "26" pad= "PF6" />
<pin position= "27" pad= "PF7" />
<pin position= "28" pad= "VDD0" />
<pin position= "29" pad= "GND0" />
<pin position= "30" pad= "PA0" />
<pin position= "31" pad= "PA1" />
<pin position= "32" pad= "PA2" />
2023-12-13 20:33:41 +00:00
</pinout>
</pinouts>
2024-02-09 00:03:15 +00:00
<variants >
<variant name= "AVR16DD32" pinout-key= "qfn32mvio" package= "QFN32" />
</variants>
</device>
