src/Targets/Targets.hpp

#pragma once

#include "src/Targets/Target.hpp"
#include "src/Targets/Microchip/AVR8/Avr8.hpp"
#include "src/Targets/RiscV/RiscV.hpp"
Initial commit 2021-04-04 21:04:12 +01:00			`#pragma once`

Tidying 2021-04-06 02:10:14 +01:00			`#include "src/Targets/Target.hpp"`
Massive refactor to accommodate RISC-V targets - Refactored entire codebase (excluding the Insight component) to accommodate multiple target architectures (no longer specific to AVR) - Deleted 'generate SVD' GDB monitor command - I will eventually move this functionality to the Bloom website - Added unit size property to address spaces - Many other changes which I couldn't be bothered to describe here 2024-07-23 21:14:22 +01:00			`#include "src/Targets/Microchip/AVR8/Avr8.hpp"`
Made a start with RISC-V target implementation 2023-11-22 00:38:40 +00:00			`#include "src/Targets/RiscV/RiscV.hpp"`