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refactor!: rewrite almost full library

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Now usbd implementation works fine (tested on atmega32u4)
This commit is contained in:
doryan
2024-12-30 21:17:23 +04:00
parent 16812fe119
commit ccb23c8c56
2 changed files with 266 additions and 235 deletions
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391
src/lib.rs
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@@ -1,8 +1,8 @@
#![no_std]
use core::cmp::max;
use core::{cmp::max, u8};
use avr_device::interrupt::free;
use avr_device::{asm::delay_cycles, interrupt::free};
use usb_device::{
bus::{PollResult, UsbBus},
endpoint::{EndpointAddress, EndpointType},
@@ -12,7 +12,7 @@ use usb_device::{
mod types;
pub use types::UsbDevice;
use types::{DPRAM_SIZE, ENDPOINTS_ALLOC_LAYOUT};
use types::{DPRAM_SIZE, ENDPOINTS_ALLOC_LAYOUT, ONE_MS_16_MGHZ};
impl<const L: usize> UsbBus for UsbDevice<L> {
fn alloc_ep(
@@ -25,117 +25,127 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
) -> UsbResult<EndpointAddress> {
// Handle first endpoint. //
if ep_addr == Some(EndpointAddress::from_parts(0, UsbDirection::In)) {
return Ok(ep_addr.unwrap());
}
let address = match ep_addr {
// If current endpoint doesn't allocated, assign ep_addr to variable. //
Some(ep_addr) if !self.ep_table[ep_addr.index()].is_allocated => ep_addr,
// If ep_aadr not provided, or current endpoint is allocated, try to find next free endpoint, otherwise return UsbError. //
None | Some(_) => {
let endpoint = self
.ep_table
.iter()
.enumerate()
.skip(1)
.find(|(i, &ep)| {
!ep.is_allocated && max_packet_size <= ENDPOINTS_ALLOC_LAYOUT[*i]
})
.ok_or(UsbError::EndpointMemoryOverflow)?;
EndpointAddress::from_parts(endpoint.0, ep_dir)
}
};
// Select endpoint info by address index. //
let target_endpoint = &mut self.ep_table[address.index()];
// Endpoint allocation marker. //
if DPRAM_SIZE - self.dpram_already_used <= max_packet_size || max_packet_size >= 512 {
Err(UsbError::EndpointMemoryOverflow)
Ok(ep_addr.unwrap())
} else {
let address = match ep_addr {
// If current endpoint doesn't allocated, assign ep_addr to variable. //
Some(addr) if !self.ep_table[addr.index()].is_allocated => addr,
// If ep_aadr not provided, or current endpoint is allocated, try to find next free endpoint, otherwise return UsbError. //
_ => {
let index = self
.ep_table
.iter()
.enumerate()
.skip(1)
.find(|(index, ep)| {
!ep.is_allocated && max_packet_size <= ENDPOINTS_ALLOC_LAYOUT[*index]
})
.ok_or(UsbError::EndpointOverflow)?
.0;
EndpointAddress::from_parts(index, ep_dir)
}
};
// Select endpoint info by address index. //
let target_endpoint = &mut self.ep_table[address.index()];
// Get power of two number of endpoint size. //
let max_packet_size = max(8, max_packet_size.next_power_of_two());
let ep_size = max(8, max_packet_size.next_power_of_two());
// Set endpoint parameters. //
// Endpoint allocation marker. //
target_endpoint.set_size(max_packet_size);
target_endpoint.set_dir(ep_dir);
target_endpoint.set_type(ep_type);
target_endpoint.is_allocated = true;
if DPRAM_SIZE - self.dpram_already_used < ep_size {
Err(UsbError::EndpointMemoryOverflow)
} else {
// Set endpoint parameters. //
// Add used dpram memory. //
target_endpoint.set_dir(ep_dir);
target_endpoint.set_type(ep_type);
target_endpoint.set_size(ep_size)?;
self.dpram_already_used += max_packet_size;
// Add used dpram memory. //
Ok(address)
target_endpoint.is_allocated = true;
self.dpram_already_used += ep_size;
Ok(address)
}
}
}
fn enable(&mut self) {
free(|cs| {
let (pll, usb) = (self.pll.borrow(cs), self.usb.borrow(cs));
let (usb, pll) = (self.usb.borrow(cs), self.pll.borrow(cs));
// Enable USB pads regulators. //
usb.uhwcon.modify(|_, w| w.uvrege().set_bit());
// PLL configuration //
pll.pllcsr.write(|w| w.pindiv().set_bit());
pll.pllfrq
.write(|w| w.pdiv().mhz96().plltm().factor_15().pllusb().set_bit());
// Enable PLL //
pll.pllcsr.modify(|_, w| w.plle().set_bit());
// Check PLL lock //
while pll.pllcsr.read().plock().bit_is_clear() {}
// Enable USB interface. //
usb.usbcon
.modify(|_, w| w.usbe().set_bit().frzclk().set_bit());
// Configuring PLL. //
pll.pllfrq
.modify(|_, w| w.pdiv().mhz96().plltm().factor_15().pllusb().set_bit());
// Enable PLL. //
pll.pllcsr
.modify(|_, w| w.pindiv().set_bit().plle().set_bit());
while pll.pllcsr.read().plock().bit_is_clear() {}
.modify(|_, w| w.usbe().set_bit().otgpade().set_bit());
// Unfreeze clock. //
usb.usbcon
.modify(|_, w| w.frzclk().clear_bit().otgpade().set_bit());
.modify(|_, w| w.frzclk().clear_bit().vbuste().set_bit());
self.allocated_endpoints().for_each(|(i, _)| {
// Endpoint configuration //
self.allocated_endpoints().for_each(|(i, _ep)| {
self.configure_endpoint(cs, i).unwrap();
});
// Set high speed and attach the USB. //
usb.udcon.modify(|_, w| w.detach().clear_bit());
// Interrupts. //
usb.udien
.modify(|_, w| w.eorste().set_bit().sofe().set_bit());
// Set high speed and attach the USB. //
usb.udcon
.modify(|_, w| w.lsm().set_bit().detach().clear_bit());
})
}
fn force_reset(&self) -> UsbResult<()> {
free(|cs| {
let usb = self.usb.borrow(cs);
let usbcon = &self.usb.borrow(cs).usbcon;
usbcon.modify(|_, w| w.usbe().set_bit());
});
usb.usbcon.modify(|_, w| w.usbe().clear_bit());
usb.usbcon.modify(|_, w| w.usbe().set_bit());
delay_cycles(ONE_MS_16_MGHZ);
Ok(())
})
free(|cs| {
let usbcon = &self.usb.borrow(cs).usbcon;
usbcon.modify(|_, w| w.usbe().set_bit());
});
Ok(())
}
fn is_stalled(&self, ep_addr: EndpointAddress) -> bool {
free(|cs| match self.select_endpoint(cs, ep_addr.index()) {
Ok(_) => self.usb.borrow(cs).ueconx.read().stallrq().bit_is_clear(),
Ok(_) => self.usb.borrow(cs).ueconx.read().stallrq().bit_is_set(),
Err(_) => false,
})
}
@@ -144,7 +154,8 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
free(|cs| {
let usb = self.usb.borrow(cs);
let (usbint, udint, udien) = (usb.usbint.read(), usb.udint.read(), usb.udien.read());
let (udint, udien, usbint) = (usb.udint.read(), usb.udien.read(), usb.usbint.read());
if usbint.vbusti().bit_is_set() {
usb.usbint.write(|w| w.vbusti().clear_bit());
if usb.usbsta.read().vbus().bit_is_set() {
@@ -153,50 +164,54 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
return PollResult::Suspend;
}
}
if udint.suspi().bit_is_set() && udien.suspe().bit_is_set() {
return PollResult::Suspend;
}
if udint.wakeupi().bit_is_set() && udien.wakeupe().bit_is_set() {
return PollResult::Resume;
}
if udint.eorsti().bit_is_set() {
return PollResult::Reset;
}
if udint.sofi().bit_is_set() {
usb.udint.write(|w| w.sofi().clear_bit());
}
// Can only query endpoints while clock is running
// (e.g. not in suspend state)
if usb.usbcon.read().frzclk().bit_is_clear() {
let (mut ep_out, mut ep_setup, mut ep_in_complete) = (0u8, 0u8, 0u8);
let (mut ep_out, mut ep_in_complete, mut ep_setup) = (0u16, 0u16, 0u16);
let pending_ins = self.pending_ins.borrow(cs);
for (index, _ep) in self.allocated_endpoints() {
if self.select_endpoint(cs, index).is_err() {
// Endpoint selection has stopped working...
for (ep_index, _ep) in self.allocated_endpoints() {
if self.select_endpoint(cs, ep_index).is_err() {
break;
}
} else {
let ueintx = usb.ueintx.read();
let ueintx = usb.ueintx.read();
if ueintx.rxouti().bit_is_set() {
ep_out |= 1 << index;
}
if ueintx.rxstpi().bit_is_set() {
ep_setup |= 1 << index;
}
if ueintx.txini().bit_is_set() {
ep_in_complete |= 1 << index;
if ueintx.rxouti().bit_is_set() {
ep_out |= 1 << ep_index;
}
if ueintx.rxstpi().bit_is_set() {
ep_setup |= 1 << ep_index;
}
if pending_ins.get() & (1 << ep_index) != 0 && ueintx.txini().bit_is_set() {
ep_in_complete |= 1 << ep_index;
pending_ins.set(pending_ins.get() & !(1 << ep_index));
}
}
}
if ep_out | ep_setup | ep_in_complete != 0 {
if ep_out | ep_in_complete | ep_setup != 0 {
return PollResult::Data {
ep_out: ep_out as u16,
ep_in_complete: ep_in_complete as u16,
ep_setup: ep_setup as u16,
ep_out,
ep_in_complete,
ep_setup,
};
}
}
PollResult::None
})
}
@@ -205,53 +220,53 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
free(|cs| {
let usb = self.usb.borrow(cs);
match self.select_endpoint(cs, ep_addr.index()) {
Ok(()) => {
let target_endpoint = self.ep_table[ep_addr.index()];
if let Err(error) = self.select_endpoint(cs, ep_addr.index()) {
Err(error)
} else {
let ep = &self.ep_table[ep_addr.index()];
if ep.ep_type == 0 {
let ueintx = usb.ueintx.read();
if ueintx.rxouti().bit_is_clear() {
if ueintx.rxouti().bit_is_clear() && ueintx.rxstpi().bit_is_clear() {
return Err(UsbError::WouldBlock);
}
if target_endpoint.ep_type == 0 {
let bytes_count_to_read: usize = (usb.uebchx.read().bits() as usize) << 8
| (usb.uebclx.read().bits() as usize);
if bytes_count_to_read > buf.len() {
return Err(UsbError::BufferOverflow);
}
for slot in &mut buf[..bytes_count_to_read] {
*slot = usb.uedatx.read().bits();
}
usb.ueintx
.write(|w| w.rxouti().clear_bit().rxstpi().clear_bit());
Ok(bytes_count_to_read)
} else {
usb.ueintx.write(|w| w.rxouti().clear_bit());
let mut bytes_read = 0;
for slot in buf {
if usb.ueintx.read().rwal().bit_is_clear() {
break;
}
*slot = usb.uedatx.read().bits();
bytes_read += 1;
}
if usb.ueintx.read().rwal().bit_is_set() {
return Err(UsbError::BufferOverflow);
}
usb.ueintx.write(|w| w.fifocon().clear_bit());
Ok(bytes_read)
let buf_size = self.get_size(cs);
if buf.len() < buf_size {
return Err(UsbError::BufferOverflow);
}
for byte in &mut buf[..buf_size] {
*byte = usb.uedatx.read().bits();
}
usb.ueintx
.write(|w| w.rxouti().clear_bit().rxstpi().clear_bit());
Ok(buf_size)
} else {
if usb.ueintx.read().rxouti().bit_is_clear() {
return Err(UsbError::WouldBlock);
}
usb.ueintx.write(|w| w.rxouti().clear_bit());
let mut bytes_read = 0;
for slot in buf {
if usb.ueintx.read().rwal().bit_is_clear() {
break;
}
*slot = usb.uedatx.read().bits();
bytes_read += 1;
}
if usb.ueintx.read().rwal().bit_is_set() {
return Err(UsbError::BufferOverflow);
}
usb.ueintx.write(|w| w.fifocon().clear_bit());
Ok(bytes_read)
}
Err(err) => Err(err),
}
})
}
@@ -262,30 +277,15 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
usb.udint.modify(|_, w| w.eorsti().clear_bit());
// Disabling all endpoints before it reset //
self.ep_table
.iter()
.filter(|&&ep| ep.is_allocated)
.enumerate()
.for_each(|(index, _ep)| {
if self.select_endpoint(cs, index).is_ok() {
usb.ueconx.modify(|_, w| w.epen().clear_bit());
}
});
self.allocated_endpoints().for_each(|(i, _)| {
self.configure_endpoint(cs, i).unwrap();
});
// Reset endpoints //
usb.uerst.modify(|_, w| unsafe { w.bits(u8::MAX >> 1) });
// Clear resume informations. //
usb.udint
.modify(|_, w| w.wakeupi().clear_bit().suspi().clear_bit());
.write(|w| w.wakeupi().clear_bit().suspi().clear_bit());
usb.udien
.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
})
@@ -293,23 +293,21 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
fn resume(&self) {
free(|cs| {
let usb = self.usb.borrow(cs);
let pll = self.pll.borrow(cs);
let (usb, pll) = (self.usb.borrow(cs), self.pll.borrow(cs));
// Enable PLL and wait PLL lock. //
// PLL enable //
pll.pllcsr.modify(|_, w| w.plle().set_bit());
pll.pllcsr
.modify(|_, w| w.pindiv().set_bit().plle().set_bit());
while pll.pllcsr.read().plock().bit_is_clear() {}
// Unfreeze USB clock. //
// Resuming //
usb.usbcon.modify(|_, w| w.frzclk().clear_bit());
// Clear resume informations. //
usb.udint
.modify(|_, w| w.wakeupi().clear_bit().suspi().clear_bit());
.write(|w| w.wakeupi().clear_bit().suspi().clear_bit());
usb.udien
.modify(|_, w| w.wakeupe().clear_bit().suspe().set_bit());
@@ -345,16 +343,22 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
fn suspend(&self) {
free(|cs| {
let usb = self.usb.borrow(cs);
let pll = self.pll.borrow(cs);
let (usb, pll) = (self.usb.borrow(cs), self.pll.borrow(cs));
usb.udint
.modify(|_, w| w.suspi().clear_bit().wakeupi().clear_bit());
.write(|w| w.wakeupi().clear_bit().suspi().clear_bit());
// Suspend. //
usb.udien
.modify(|_, w| w.suspe().clear_bit().wakeupe().clear_bit());
.modify(|_, w| w.wakeupe().set_bit().suspe().clear_bit());
// Freeze clock. //
usb.usbcon.modify(|_, w| w.frzclk().set_bit());
// Disable PLL. //
pll.pllcsr.modify(|_, w| w.plle().clear_bit());
})
}
@@ -363,49 +367,50 @@ impl<const L: usize> UsbBus for UsbDevice<L> {
free(|cs| {
let usb = self.usb.borrow(cs);
match self.select_endpoint(cs, ep_addr.index()) {
Ok(()) => {
let target_endpoint = self.ep_table[ep_addr.index()];
if let Err(error) = self.select_endpoint(cs, ep_addr.index()) {
Err(error)
} else {
let ep = &self.ep_table[ep_addr.index()];
let ueintx = usb.ueintx.read();
// Endpoint type confitions //
if ueintx.rxouti().bit_is_clear() {
if ep.ep_type == 0 {
if usb.ueintx.read().txini().bit_is_clear() {
return Err(UsbError::WouldBlock);
}
if target_endpoint.ep_type == 0 {
let bytes_count_to_read: usize = (usb.uebchx.read().bits() as usize) << 8
| (usb.uebclx.read().bits() as usize);
if buf.len() > ep.get_size() {
return Err(UsbError::BufferOverflow);
}
if bytes_count_to_read > buf.len() {
for &byte in buf {
usb.uedatx.write(|w| w.bits(byte));
}
usb.ueintx.write(|w| w.txini().clear_bit());
} else {
if usb.ueintx.read().txini().bit_is_clear() {
return Err(UsbError::WouldBlock);
}
usb.ueintx
.write(|w| w.txini().clear_bit().rxouti().clear_bit());
for &byte in buf {
if usb.ueintx.read().rwal().bit_is_set() {
usb.uedatx.write(|w| w.bits(byte));
} else {
return Err(UsbError::BufferOverflow);
}
buf.iter()
.for_each(|&byte| usb.uedatx.write(|w| w.bits(byte)));
usb.ueintx
.write(|w| w.rxouti().clear_bit().rxstpi().clear_bit());
Ok(bytes_count_to_read)
} else {
usb.ueintx
.write(|w| w.txini().clear_bit().rxouti().clear_bit());
for &byte in buf {
if usb.ueintx.read().rwal().bit_is_set() {
return Err(UsbError::BufferOverflow);
} else {
usb.uedatx.write(|w| w.bits(byte));
}
}
usb.ueintx
.write(|w| w.fifocon().clear_bit().rxouti().clear_bit());
Ok(buf.len())
}
usb.ueintx
.write(|w| w.txini().clear_bit().fifocon().clear_bit());
}
Err(err) => Err(err),
let pending_ins = self.pending_ins.borrow(cs);
pending_ins.set(pending_ins.get() | 1 << ep_addr.index());
Ok(buf.len())
}
})
}